diff -Ncr utkernel_source.orig/CHANGES.txt utkernel_source.curr/CHANGES.txt *** utkernel_source.orig/CHANGES.txt Thu Jan 1 09:00:00 1970 --- utkernel_source.curr/CHANGES.txt Sat Apr 4 17:56:38 2009 *************** *** 0 **** --- 1,112 ---- + This patch is unofficial, and patched source code tree is not passed + the uT-Kernel compatibility test. + + So, patched uT-Kernel source code is no longer "uT-Kernel". + + But even if you apply this patch, patched source code is + still under uT-License, please be careful. + + This unofficial patch itself is public domain, no warranty. + + Have fun! + + ---- + + config/sysdepend/app_at91/utk_config_depend.h + MODIFIED + - machine name (comment) + - value SYSTEMAREA_TOP, SYSTEMAREA_END + - value RI_USERAREA_TOP, CFN_REALMEMEND, EXCEPTION_STACK_TOP + ADDED + - value APPLICATION_STACK_TOP + etc/{mkfuncfiles,mkiflib,mktdsvc,mktksvc} + MODIFIED + - path to Perl (/usr/local/bin/perl->/usr/local/bin/perl) + etc/platform + ADDED + - OpenBSD support + etc/sysdepend/app_at91/makerules.sysdepend + MODIFIED + - *no* thumb interworking (_CODESET_FLAGS_) + - name of C compiler (CC: gccarm->gcc) + ADDED + - CPU clock value (PCLK is CPU clock / 4) + - OpenBSD support + NOTICE + - _TE_SYSTEM_NAME_ is still _APP_AT91_. + include/tk/sysdepend/app_at91/sysdef_depend.h + MODIFIED + - machine name (comment) + - machine specific register definitions + include/tk/sysdepend/app_at91/syslib_depend.h + MODIFIED + - machine name (comment) + - EnableInt() + REMOVED + - SetIntMode(), ClearInt() + ADDED + - SetIntLevel() + kernel/sysdepend/cpu/at91/cpu_insn.h + MODIFIED + - knl_define_inthdr() + kernel/sysdepend/device/app_at91/devinit.c + MODIFIED + - machine name (comment) + - knl_init_device() calls sio.c:sio_init() + kernel/sysdepend/device/app_at91/icrt0.S + MODIFIED + - EIT vector table + - knl_irq_handler for LPC2388 VIC (ARM PrimeCell PL192) + REMOVED + - #include "hwconfig.h" + - FIQ support + - uTeaboard setup code + - serial I/O setup code + - section .ftext.1, .ftext.2, .ftext.3, .romtext.1 and .romtext.2 + ADDED + - LPC2388 setup code (CPU clock:72MHz by internal R/C-OSC, PCLK:18MHz) + NOTICE + - swi_handler supports ARM SWI instruction (no Thumb SWI) + kernel/sysdepend/device/app_at91/tkdev_conf.h + REMOVED + - machine name (comment) + - value EXCEPTION_STACK_TOP, APPLICATION_STACK_TOP + - value TMCLK, TIMER_INTLEVEL + kernel/sysdepend/device/app_at91/tkdev_init.c + MODIFIED + - machine name (comment) + - knl_tkdev_initialize() sets VIC + REMOVED + - EXPORT UW knl_TimerClkDiv; + kernel/sysdepend/device/app_at91/tkdev_timer.h + REWRITED + - LPC2388 Timer#0 support + kernel/sysmain/build/app_at91/kernel-ram.lnk + REWRITED + - LPC2388 memory map support + kernel/sysmain/build/app_at91/kernel-rom.lnk + REWRITED + - LPC2388 memory map support + kernel/sysmain/src/Makefile.common + ADDED + - GNU make (gmake) support (make->$(MAKE)) + lib/build/Makefile.common + ADDED + - GNU make (gmake) support (make->$(MAKE)) + lib/libstr/src/Makefile.common + ADDED + - GNU make (gmake) support (make->$(MAKE)) + lib/libtk/src/Makefile.common + ADDED + - GNU make (gmake) support (make->$(MAKE)) + lib/libtk/src/sysdepend/app_at91/int.c + REWRITED + - LPC2388 VIC (ARM PrimeCell PL192) support + lib/libtm/build/app_at91/Makefile + MODIFIED + - target source file (SRC: sio.S->sio.c) + lib/libtm/src/sysdepend/app_at91/sio.c + ADDED + - LPC2388 UART(16550) support + NOTICE + - sio.c is not under uT-License (public domain, no warranty). diff -Ncr utkernel_source.orig/config/sysdepend/app_at91/utk_config_depend.h utkernel_source.curr/config/sysdepend/app_at91/utk_config_depend.h *** utkernel_source.orig/config/sysdepend/app_at91/utk_config_depend.h Tue Feb 12 17:18:44 2008 --- utkernel_source.curr/config/sysdepend/app_at91/utk_config_depend.h Mon Mar 16 21:01:31 2009 *************** *** 13,29 **** */ /* ! * utk_config_depend.h (at91) * System Configuration Definition */ /* ROMINFO */ ! #define SYSTEMAREA_TOP 0x20000000 /* RAM system area top */ ! #define SYSTEMAREA_END 0x20200000 /* RAM system area end */ /* User definition */ ! #define RI_USERAREA_TOP 0x20100000 /* RAM user area top */ #define RI_USERINIT NULL /* User initialization program */ --- 13,29 ---- */ /* ! * utk_config_depend.h (lpc2388) * System Configuration Definition */ /* ROMINFO */ ! #define SYSTEMAREA_TOP 0x40000000 /* RAM system area top */ ! #define SYSTEMAREA_END 0x40010000 /* RAM system area end */ /* User definition */ ! #define RI_USERAREA_TOP 0x40010000 /* RAM user area top */ #define RI_USERINIT NULL /* User initialization program */ *************** *** 58,64 **** #define CFN_VER_PRNO3 0 #define CFN_VER_PRNO4 0 ! #define CFN_REALMEMEND ((VP)0x20200000) /* * Initial task priority --- 58,64 ---- #define CFN_VER_PRNO3 0 #define CFN_VER_PRNO4 0 ! #define CFN_REALMEMEND ((VP)0x40010000) /* * Initial task priority *************** *** 79,85 **** #define UND_STACK_SIZE 4 /* 1 word */ #define USR_STACK_SIZE 0 /* not used */ ! #define EXCEPTION_STACK_TOP INTERNAL_RAM_END /* * Use dynamic memory allocation --- 79,86 ---- #define UND_STACK_SIZE 4 /* 1 word */ #define USR_STACK_SIZE 0 /* not used */ ! #define APPLICATION_STACK_TOP 0x00000000 /* not used */ ! #define EXCEPTION_STACK_TOP 0x40010000 /* * Use dynamic memory allocation diff -Ncr utkernel_source.orig/etc/mkfuncfiles utkernel_source.curr/etc/mkfuncfiles *** utkernel_source.orig/etc/mkfuncfiles Tue Feb 12 17:18:44 2008 --- utkernel_source.curr/etc/mkfuncfiles Sat Feb 28 21:30:29 2009 *************** *** 1,4 **** ! #! /usr/local/bin/perl # # ---------------------------------------------------------------------- # micro T-Kernel --- 1,4 ---- ! #! /usr/bin/perl # # ---------------------------------------------------------------------- # micro T-Kernel diff -Ncr utkernel_source.orig/etc/mkiflib utkernel_source.curr/etc/mkiflib *** utkernel_source.orig/etc/mkiflib Tue Feb 12 17:18:44 2008 --- utkernel_source.curr/etc/mkiflib Sat Feb 28 21:30:47 2009 *************** *** 1,4 **** ! #! /usr/local/bin/perl # # ---------------------------------------------------------------------- # micro T-Kernel --- 1,4 ---- ! #! /usr/bin/perl # # ---------------------------------------------------------------------- # micro T-Kernel diff -Ncr utkernel_source.orig/etc/mktdsvc utkernel_source.curr/etc/mktdsvc *** utkernel_source.orig/etc/mktdsvc Tue Feb 12 17:18:44 2008 --- utkernel_source.curr/etc/mktdsvc Sat Feb 28 21:31:04 2009 *************** *** 1,4 **** ! #! /usr/local/bin/perl # # ---------------------------------------------------------------------- # micro T-Kernel --- 1,4 ---- ! #! /usr/bin/perl # # ---------------------------------------------------------------------- # micro T-Kernel diff -Ncr utkernel_source.orig/etc/mktksvc utkernel_source.curr/etc/mktksvc *** utkernel_source.orig/etc/mktksvc Tue Feb 12 17:18:44 2008 --- utkernel_source.curr/etc/mktksvc Sat Feb 28 21:30:57 2009 *************** *** 1,4 **** ! #! /usr/local/bin/perl # # ---------------------------------------------------------------------- # micro T-Kernel --- 1,4 ---- ! #! /usr/bin/perl # # ---------------------------------------------------------------------- # micro T-Kernel diff -Ncr utkernel_source.orig/etc/platform utkernel_source.curr/etc/platform *** utkernel_source.orig/etc/platform Tue Feb 12 17:18:44 2008 --- utkernel_source.curr/etc/platform Sat Feb 28 21:31:25 2009 *************** *** 19,24 **** --- 19,25 ---- SunOS) platform=$os-`uname -p` ;; Linux) platform=$os-`uname -m` ;; FreeBSD) platform=$os-`uname -p` ;; + OpenBSD) platform=$os-`uname -m` ;; *) platform=unknown ;; esac diff -Ncr utkernel_source.orig/etc/sysdepend/app_at91/makerules.sysdepend utkernel_source.curr/etc/sysdepend/app_at91/makerules.sysdepend *** utkernel_source.orig/etc/sysdepend/app_at91/makerules.sysdepend Tue Feb 12 17:18:45 2008 --- utkernel_source.curr/etc/sysdepend/app_at91/makerules.sysdepend Mon Mar 16 21:02:19 2009 *************** *** 38,43 **** --- 38,46 ---- ifneq ($(filter Linux-%, $(CROSS_ARCH)), ) PATH := $(PATH):/usr/local/bin:/bin:/usr/bin endif + ifneq ($(filter OpenBSD-%, $(CROSS_ARCH)), ) + PATH := $(PATH):/usr/local/bin:/bin:/usr/bin + endif # ----- T-Engine Appliance AT91M55800A (ARM7TDMI) --------------------------------- *************** *** 45,56 **** TARGET_ARCH = # target type ! _CPUTYPE_FLAGS = -march=armv4t _CPUTYPE_FLAGS_AS = -marmv4t -mno-fpu ! _TE_SYSTEM_NAME_ = _APP_AT91_ # code set ! _CODESET_FLAGS = -mthumb-interwork ### build option ### CFLAGS += --- 48,59 ---- TARGET_ARCH = # target type ! _CPUTYPE_FLAGS = -march=armv4t -Wall -Werror _CPUTYPE_FLAGS_AS = -marmv4t -mno-fpu ! _TE_SYSTEM_NAME_ = _APP_AT91_ # XXX # code set ! _CODESET_FLAGS = -mno-thumb-interwork # XXX ### build option ### CFLAGS += *************** *** 58,65 **** ASFLAGS += LDFLAGS += ### C ### ! CC := $(GNUarm)/bin/gccarm OUTPUT_OPTION = -o $@ ifeq ($(mode), debug) CFLAGS += -g --- 61,71 ---- ASFLAGS += LDFLAGS += + ### CPU CLOCK (Hz) ### + CFLAGS += -DCPU_CLOCK=72000000UL + ### C ### ! CC := $(GNUarm)/bin/gcc OUTPUT_OPTION = -o $@ ifeq ($(mode), debug) CFLAGS += -g diff -Ncr utkernel_source.orig/include/tk/sysdepend/app_at91/sysdef_depend.h utkernel_source.curr/include/tk/sysdepend/app_at91/sysdef_depend.h *** utkernel_source.orig/include/tk/sysdepend/app_at91/sysdef_depend.h Tue Feb 12 17:18:47 2008 --- utkernel_source.curr/include/tk/sysdepend/app_at91/sysdef_depend.h Sat Mar 21 20:26:36 2009 *************** *** 13,21 **** */ /* ! * @(#)sysdef_depend.h (tk/AT91) * ! * Definition about AT91M55800A * * Included also from assembler program. */ --- 13,21 ---- */ /* ! * @(#)sysdef_depend.h (tk/lpc2388) * ! * Definition about LPC2388 * * Included also from assembler program. */ *************** *** 59,362 **** /* ------------------------------------------------------------------------ */ /* ! * Special Function Registers */ ! #define SF_BASE 0xfff00000 ! #define SF_CIDR 0x00 ! #define SF_EXID 0x04 ! #define SF_RSR 0x08 ! /* reserved 0x0c */ ! /* reserved 0x10 */ ! /* reserved 0x14 */ ! #define SF_PMR 0x18 ! #define PMRKEY 0x27a80000 /* ! * External Bus Interface */ ! #define EBI_BASE 0xffe00000 ! #define EBI_RCR 0x20 ! #define EBI_MCR 0x24 ! ! /* ! * Advanced Power Management Controller ! */ ! #define APMC_BASE 0xffff4000 ! #define APMC_SCER 0x00 ! #define APMC_SCDR 0x04 ! #define APMC_SCSR 0x08 ! /* reserved 0x0c */ ! #define APMC_PCER 0x10 ! #define APMC_PCDR 0x14 ! #define APMC_PCSR 0x18 ! /* reserved 0x1c */ ! #define APMC_CGMR 0x20 ! /* reserved 0x24 */ ! #define APMC_PCR 0x28 ! #define APMC_PMR 0x2c ! #define APMC_SR 0x30 ! #define APMC_IER 0x34 ! #define APMC_IDR 0x38 ! #define APMC_IMR 0x3c ! ! #define APMC_MOSC_BYP 0x01 ! #define APMC_MOSC_EN 0x02 ! #define APMC_MKCO_DIS 0x04 ! #define APMC_PRES_NONE (0x00 << 4) ! #define APMC_PRES_DIV2 (0x01 << 4) ! #define APMC_PRES_DIV4 (0x02 << 4) ! #define APMC_PRES_DIV8 (0x03 << 4) ! #define APMC_PRES_DIV16 (0x04 << 4) ! #define APMC_PRES_DIV32 (0x05 << 4) ! #define APMC_PRES_DIV64 (0x06 << 4) ! ! #define APMC_CSS_LF 0x00 ! #define APMC_CSS_MOSC 0x01 ! #define APMC_CSS_PLL 0x02 ! ! #define APMC_SHDALC 0x01 ! #define APMC_WKACKC 0x02 ! ! #define APMC_SHDALS_OUT_TRIS 0x00 ! #define APMC_SHDALS_OUT_LEVEL0 0x01 ! #define APMC_SHDALS_OUT_LEVEL1 0x02 ! #define APMC_WKACKS_OUT_TRIS (0x00 << 2) ! #define APMC_WKACKS_OUT_LEVEL0 (0x01 << 2) ! #define APMC_WKACKS_OUT_LEVEL1 (0x02 << 2) ! #define APMC_WKEN (0x01 << 4) ! #define APMC_ALSHEN (0x01 << 5) ! #define APMC_WKEDG_NONE (0x00 << 6) ! #define APMC_WKEDG_POS_EDG (0x01 << 6) ! #define APMC_WKEDG_NEG_EDG (0x02 << 6) ! #define APMC_WKEDG_BOTH_EDG (0x03 << 6) ! ! #define APMC_MOSCS 0x01 ! #define APMC_PLL_LOCK 0x02 ! ! /* ! * Parallel IO ! */ ! #define PIOA_BASE 0xfffec000 ! #define PIOB_BASE 0xffff0000 ! #define PIO_PER 0x00 ! #define PIO_PDR 0x04 ! #define PIO_PSR 0x08 ! /* reserved 0x0c */ ! #define PIO_OER 0x10 ! #define PIO_ODR 0x14 ! #define PIO_OSR 0x18 ! /* reserved 0x1c */ ! #define PIO_IFER 0x20 ! #define PIO_IFDR 0x24 ! #define PIO_IFSR 0x28 ! /* reserved 0x2c */ ! #define PIO_SODR 0x30 ! #define PIO_CODR 0x34 ! #define PIO_ODSR 0x38 ! #define PIO_PDSR 0x3c ! #define PIO_IER 0x40 ! #define PIO_IDR 0x44 ! #define PIO_IMR 0x48 ! #define PIO_ISR 0x4c ! #define PIO_MDER 0x50 ! #define PIO_MDDR 0x54 ! #define PIO_MDSR 0x58 ! /* reserved 0x5c */ ! ! /* ! * Advanced Interrupt Controller ! */ ! #define FIQ 0 ! #define SWIRQ 1 ! #define US0IRQ 2 ! #define US1IRQ 3 ! #define US2IRQ 4 ! #define SPIRQ 5 ! #define TC0IRQ 6 ! #define TC1IRQ 7 ! #define TC2IRQ 8 ! #define TC3IRQ 9 ! #define TC4IRQ 10 ! #define TC5IRQ 11 ! #define WDIRQ 12 ! #define PIOAIRQ 13 ! #define PIOBIRQ 14 ! #define AD0IRQ 15 ! #define AD1IRQ 16 ! #define DA0IRQ 17 ! #define DA1IRQ 18 ! #define RTCIRQ 19 ! #define APMCIRQ 20 ! #define SCLKIRQ 23 ! #define IRQ5 24 ! #define IRQ4 25 ! #define IRQ3 26 ! #define IRQ2 27 ! #define IRQ1 28 ! #define IRQ0 29 ! #define COMMRX 30 ! #define COMMTX 31 ! ! #define AIC_BASE 0xfffff000 ! #define AIC_SMR0 0x0000 ! #define AIC_SMR1 0x0004 ! #define AIC_SMR2 0x0008 ! #define AIC_SMR3 0x000c ! #define AIC_SMR4 0x0010 ! #define AIC_SMR5 0x0014 ! #define AIC_SMR6 0x0018 ! #define AIC_SMR7 0x001c ! #define AIC_SMR8 0x0020 ! #define AIC_SMR9 0x0024 ! #define AIC_SMR10 0x0028 ! #define AIC_SMR11 0x002c ! #define AIC_SMR12 0x0030 ! #define AIC_SMR13 0x0034 ! #define AIC_SMR14 0x0038 ! #define AIC_SMR15 0x003c ! #define AIC_SMR16 0x0040 ! #define AIC_SMR17 0x0044 ! #define AIC_SMR18 0x0048 ! #define AIC_SMR19 0x004c ! #define AIC_SMR20 0x0050 ! #define AIC_SMR21 0x0054 ! #define AIC_SMR22 0x0058 ! #define AIC_SMR23 0x005c ! #define AIC_SMR24 0x0060 ! #define AIC_SMR25 0x0064 ! #define AIC_SMR26 0x0068 ! #define AIC_SMR27 0x006c ! #define AIC_SMR28 0x0070 ! #define AIC_SMR29 0x0074 ! #define AIC_SMR30 0x0078 ! #define AIC_SMR31 0x007c ! #define AIC_SVR0 0x0080 ! #define AIC_SVR1 0x0084 ! #define AIC_SVR2 0x0088 ! #define AIC_SVR3 0x008c ! #define AIC_SVR4 0x0090 ! #define AIC_SVR5 0x0094 ! #define AIC_SVR6 0x0098 ! #define AIC_SVR7 0x009c ! #define AIC_SVR8 0x00a0 ! #define AIC_SVR9 0x00a4 ! #define AIC_SVR10 0x00a8 ! #define AIC_SVR11 0x00ac ! #define AIC_SVR12 0x00b0 ! #define AIC_SVR13 0x00b4 ! #define AIC_SVR14 0x00b8 ! #define AIC_SVR15 0x00bc ! #define AIC_SVR16 0x00c0 ! #define AIC_SVR17 0x00c4 ! #define AIC_SVR18 0x00c8 ! #define AIC_SVR19 0x00cc ! #define AIC_SVR20 0x00d0 ! #define AIC_SVR21 0x00d4 ! #define AIC_SVR22 0x00d8 ! #define AIC_SVR23 0x00dc ! #define AIC_SVR24 0x00e0 ! #define AIC_SVR25 0x00e4 ! #define AIC_SVR26 0x00e8 ! #define AIC_SVR27 0x00ec ! #define AIC_SVR28 0x0070 ! #define AIC_SVR29 0x00f4 ! #define AIC_SVR30 0x00f8 ! #define AIC_SVR31 0x00fc ! #define AIC_IVR 0x0100 ! #define AIC_FVR 0x0104 ! #define AIC_ISR 0x0108 ! #define AIC_IPR 0x010c ! #define AIC_IMR 0x0110 ! #define AIC_CISR 0x0114 ! /* reserved 0x0118 */ ! /* reserved 0x011c */ ! #define AIC_IECR 0x0120 ! #define AIC_IDCR 0x0124 ! #define AIC_ICCR 0x0128 ! #define AIC_ISCR 0x012c ! #define AIC_EOICR 0x0130 ! #define AIC_SPU 0x0134 ! ! /* ! * Timer Counter ! */ ! #define TCB0_BASE 0xfffd0000 ! #define TCB1_BASE 0xfffd4000 ! #define TC_C0 0x00 ! #define TC_C1 0x40 ! #define TC_C2 0x80 ! #define TC_CCR 0x00 ! #define TC_CMR 0x04 ! /* reserved 0x08 */ ! /* reserved 0x0c */ ! #define TC_CVR 0x10 ! #define TC_RA 0x14 ! #define TC_RB 0x18 ! #define TC_RC 0x1c ! #define TC_SR 0x20 ! #define TC_IER 0x24 ! #define TC_IDR 0x28 ! #define TC_IMR 0x2c ! #define TC_BCR 0xc0 ! #define TC_BMR 0xc4 ! ! #define TC_CLKEN 0x01 ! #define TC_CLKDIS 0x02 ! #define TC_SWTRG 0x04 ! ! #define TC_CLKS_MCK2 0x00 ! #define TC_CLKS_MCK8 0x01 ! #define TC_CLKS_MCK32 0x02 ! #define TC_CLKS_MCK128 0x03 ! #define TC_CLKS_MCK1024 0x04 ! #define TC_CLKS_XC0 0x05 ! #define TC_CLKS_XC1 0x06 ! #define TC_CLKS_XC2 0x07 ! #define TC_CLKI 0x08 ! #define TC_BURST_NONE 0x00 ! #define TC_BURST_XC0 0x10 ! #define TC_BURST_XC1 0x20 ! #define TC_BURST_XC2 0x30 ! #define TC_LDBSTOP 0x40 ! #define TC_LDBDIS 0x80 ! #define TC_ETRGEDG_EDGE_NONE 0x0000 ! #define TC_ETRGEDG_RIDING_EDGE 0x0100 ! #define TC_ETRGEDG_FALLING_EDGE 0x0200 ! #define TC_ETRGEDG_BOTH_EDGE 0x0300 ! #define TC_ABETRG_TIOB 0x0000 ! #define TC_ABETRG_TIOA 0x0400 ! #define TC_CPCTRG 0x4000 ! #define TC_WAVE 0x8000 ! #define TC_LDRA_EDGE_NONE 0x0000 ! #define TC_LDRA_RISING_EDGE 0x010000 ! #define TC_LDRA_FALLING_EDGE 0x020000 ! #define TC_LDRA_BOTH_EDGE 0x030000 ! #define TC_LDRB_EDGE_NONE 0x000000 ! #define TC_LDRB_RISING_EDGE 0x040000 ! #define TC_LDRB_FALLING_EDGE 0x080000 ! #define TC_LDRB_BOTH_EDGE 0x0c0000 ! /* ! * USART ! */ ! #define USART0_BASE 0xfffc0000 ! #define USART1_BASE 0xfffc4000 ! #define USART2_BASE 0xfffc8000 ! #define US_CR 0x00 ! #define US_MR 0x04 ! #define US_IER 0x08 ! #define US_IDR 0x0c ! #define US_IMR 0x10 ! #define US_CSR 0x14 ! #define US_RHR 0x18 ! #define US_THR 0x1c ! #define US_BRGR 0x20 ! #define US_RTOR 0x24 ! #define US_TTGR 0x28 ! /* reserved 0x2c */ ! #define US_RPR 0x30 ! #define US_RCR 0x34 ! #define US_TPR 0x38 ! #define US_TCR 0x3c ! #endif /* __TK_SYSDEF_DEPEND_H__ */ --- 59,96 ---- /* ------------------------------------------------------------------------ */ /* ! * Vectored Interrupt Controller */ ! #define VICBase 0xfffff000 ! #define VICIRQStatus (VICBase + 0x0000) ! #define VICFIQStatus (VICBase + 0x0004) ! #define VICRawIntr (VICBase + 0x0008) ! #define VICIntSelect (VICBase + 0x000c) ! #define VICIntEnable (VICBase + 0x0010) ! #define VICIntEnClr (VICBase + 0x0014) ! #define VICSoftInt (VICBase + 0x0018) ! #define VICSoftIntClear (VICBase + 0x001c) ! #define VICProtection (VICBase + 0x0020) ! #define VICSWPriorityMask (VICBase + 0x0024) ! #define VICVectAddr(x) (VICBase + 0x0100 + ((x) * 4)) ! #define VICVectPriority(x) (VICBase + 0x0200 + ((x) * 4)) ! #define VICAddress (VICBase + 0x0f00) /* ! * System Control Registers */ ! #define SystemControlBase 0xe01fc000 ! #define MEMMAP (SystemControlBase + 0x0040) ! #define PLLCON (SystemControlBase + 0x0080) ! #define PLLCFG (SystemControlBase + 0x0084) ! #define PLLSTAT (SystemControlBase + 0x0088) ! #define PLLFEED (SystemControlBase + 0x008c) ! #define PCONP (SystemControlBase + 0x00c4) ! #define APBDIV (SystemControlBase + 0x0100) // LPC21xx/22xx ! #define CCLKCFG (SystemControlBase + 0x0104) // LPC23xx ! #define USBCLKCFG (SystemControlBase + 0x0108) // LPC23xx ! #define CLKSRCSEL (SystemControlBase + 0x010c) // LPC23xx ! #define PCLKSEL0 (SystemControlBase + 0x01a8) // LPC23xx ! #define PCLKSEL1 (SystemControlBase + 0x01ac) // LPC23xx #endif /* __TK_SYSDEF_DEPEND_H__ */ diff -Ncr utkernel_source.orig/include/tk/sysdepend/app_at91/syslib_depend.h utkernel_source.curr/include/tk/sysdepend/app_at91/syslib_depend.h *** utkernel_source.orig/include/tk/sysdepend/app_at91/syslib_depend.h Tue Feb 12 17:18:47 2008 --- utkernel_source.curr/include/tk/sysdepend/app_at91/syslib_depend.h Mon Mar 16 22:17:40 2009 *************** *** 13,21 **** */ /* ! * @(#)syslib_depend.h (tk/AT91) * ! * micro T-Kernel AT91M55800A Library */ #ifndef __TK_SYSLIB_DEPEND_H__ --- 13,21 ---- */ /* ! * @(#)syslib_depend.h (tk/LPC2388) * ! * micro T-Kernel LPC2388 Library */ #ifndef __TK_SYSLIB_DEPEND_H__ *************** *** 52,80 **** #define DINTNO(intvec) (intvec) /* - * Interrupt mode setting - * Set the interrupt specified by 'intvec' to the mode specified - * by 'mode.' - * For FIQ IRQ, the interrupt controllers, Level register and - * Polarity register, are set. - * - * For GPA GPB, the GPIO controllers, Interrupt Type register - * and Interrupt Polarity register, are set. - * - * mode := (IM_LEVEL || IM_EDGE) | (IM_HI || IM_LOW) - */ - IMPORT void SetIntMode( INTVEC intvec, UINT mode ); - - #define IM_LEVEL 0 /* level trigger */ - #define IM_EDGE 1 /* edge trigger */ - #define IM_HI 2 /* high level trigger/positive edge trigger */ - #define IM_LOW 0 /* low level trigger/negative edge trigger */ - - /* * Interrupt enable * Enable the interrupt specified by 'intvec.' */ ! IMPORT void EnableInt( INTVEC intvec ); /* * Interrupt disable --- 52,62 ---- #define DINTNO(intvec) (intvec) /* * Interrupt enable * Enable the interrupt specified by 'intvec.' + * intpri is interrupt priority, 0 (Highest) ... 15 (Lowest). */ ! IMPORT void EnableInt( INTVEC intvec, INT intpri ); /* * Interrupt disable *************** *** 83,97 **** IMPORT void DisableInt( INTVEC intvec ); /* - * Clear interrupt request - * Clear the interrupt request specified by 'intvec.' - * Available only for edge trigger. - * For edge trigger, need to clear the interrupt with - * interrupt handler. - */ - IMPORT void ClearInt( INTVEC intvec ); - - /* * Check for existence of interrupt request * Check whether there is an interrupt request specified by 'intvec.' * If there is an interrupt request, return TRUE (except 0). --- 65,70 ---- *************** *** 102,107 **** --- 75,89 ---- * Issue EOI(End Of Interrupt) */ IMPORT void EndOfInt( INTVEC intvec ); + + /* + * Interrupt priority mask + * Mask all interrupts which have equal or lower priority. + * intpri is priority mask, 0 ... 16. + * 0/16 masks/unmasks all interrupts, 7 masks priority 7 ... 15. + * Return value is old priority mask (intpri value). + */ + IMPORT INT SetIntLevel( INT intpri ); /* ------------------------------------------------------------------------ */ diff -Ncr utkernel_source.orig/kernel/sysdepend/cpu/at91/cpu_insn.h utkernel_source.curr/kernel/sysdepend/cpu/at91/cpu_insn.h *** utkernel_source.orig/kernel/sysdepend/cpu/at91/cpu_insn.h Tue Feb 12 17:18:49 2008 --- utkernel_source.curr/kernel/sysdepend/cpu/at91/cpu_insn.h Sun Mar 15 21:16:19 2009 *************** *** 13,20 **** */ /* ! * cpu_insn.h (AT91) ! * AT91M55800A-Dependent Operation */ #ifndef _CPU_INSN_ --- 13,19 ---- */ /* ! * cpu_insn.h */ #ifndef _CPU_INSN_ *************** *** 48,59 **** */ Inline void knl_define_inthdr( INT vecno, FP inthdr ) { - IMPORT FP knl_irq_handler; - knl_intvec[vecno] = inthdr; - if (vecno < 32) { - out_w((AIC_BASE | AIC_SVR0) + vecno*4, (UW)&knl_irq_handler); - } } /* --- 47,53 ---- diff -Ncr utkernel_source.orig/kernel/sysdepend/device/app_at91/devinit.c utkernel_source.curr/kernel/sysdepend/device/app_at91/devinit.c *** utkernel_source.orig/kernel/sysdepend/device/app_at91/devinit.c Tue Feb 12 17:18:50 2008 --- utkernel_source.curr/kernel/sysdepend/device/app_at91/devinit.c Mon Mar 16 21:08:46 2009 *************** *** 13,19 **** */ /* ! * devinit.c (AT91) * Device-Dependent Initialization */ --- 13,19 ---- */ /* ! * devinit.c (LPC2388) * Device-Dependent Initialization */ *************** *** 35,40 **** --- 35,44 ---- EXPORT ER knl_init_device( void ) { + IMPORT void sio_init( void ); + + sio_init(); // UART setup + return E_OK; } diff -Ncr utkernel_source.orig/kernel/sysdepend/device/app_at91/icrt0.S utkernel_source.curr/kernel/sysdepend/device/app_at91/icrt0.S *** utkernel_source.orig/kernel/sysdepend/device/app_at91/icrt0.S Tue Feb 12 17:18:50 2008 --- utkernel_source.curr/kernel/sysdepend/device/app_at91/icrt0.S Sat Mar 21 15:32:12 2009 *************** *** 18,24 **** * Start up module */ - #include "hwconfig.h" #include "utk_config.h" #include --- 18,23 ---- *************** *** 38,44 **** .align 0 .global __reset __reset: ! b start /* reset */ .global undef_vector undef_vector: b undef_vector /* undefined operation */ --- 37,43 ---- .align 0 .global __reset __reset: ! ldr pc, =start /* reset (long jump) */ .global undef_vector undef_vector: b undef_vector /* undefined operation */ *************** *** 56,185 **** b reserved_vector /* reserved */ .global irq_vector irq_vector: ! ldr pc, [pc, #-0xf20] /* IRQ: AIC_IVR */ .global fiq_vector fiq_vector: ! ldr pc, [pc, #-0xf20] /* FIQ: AIC_FVR */ /* * Start up routine */ ! .section .ftext.1,"ax" .code 32 .align 0 .global start start: msr cpsr, #(PSR_SVC|PSR_DI) ! .section .romtext.1,"ax" ! .code 32 ! .align 0 ! flashrom_init: ! /* r0 := EBI_BASE(0xffe00000) */ ! mov r0, #(0xff << 24) ! orr r0, r0, #(0xe0 << 16) ! /* r1 := EBI_CSR0(0x100020b1) */ ! mov r1, #(0x10 << 24) ! orr r1, r1, #(0x20 << 8) ! orr r1, r1, #(0xb1) ! str r1, [r0, #0] ! crystal_init: ! add r9, pc, #(crystal_immediates - . - 8) ! ldmia r9, {r0-r2} ! /* ! r0 = ENABLE_16MHz_CRYSTAL, ! r1 = APMC_BASE | APMC_CGMR, ! r2 = APMC_BASE | APMC_SR ! */ ! /* enable 16MHz crystal */ ! str r0, [r1] ! wait_stabilized: ! ldr r3, [r2] ! tst r3, #APMC_MOSCS ! beq wait_stabilized /* if APMC_SR & APMC_SR_MOSCS == 0 */ ! /* use 16MHz */ ! orr r0, r0, #(0x01 << 14) /* Main Oscillator */ ! str r0, [r1] ! b setup_ram_vectors ! crystal_immediates: ! .long ENABLE_16MHz_CRYSTAL ! .long APMC_BASE | APMC_CGMR ! .long APMC_BASE | APMC_SR ! ram_vector_table: ! ldr pc, [pc, #0x18] /* reset */ ! ldr pc, [pc, #0x18] /* undefined operation */ ! ldr pc, [pc, #0x18] /* software interrupt */ ! ldr pc, [pc, #0x18] /* prefetch abort */ ! ldr pc, [pc, #0x18] /* data abort */ ! nop /* reserved */ ! ldr pc, [pc, #-0xf20] /* IRQ: AIC_IVR */ ! ldr pc, [pc, #-0xf20] /* FIQ: AIC_FVR */ ! ram_vector_address_table: ! .long start ! .long undef_vector ! .long swi_vector ! .long prefetch_vector ! .long data_abort_vector ! setup_ram_vectors: ! mov r8, #INTERNAL_RAM_START_BEFORE_REMAP /* dst*/ ! sub r9, pc, #(8 + . - ram_vector_table) /* src */ ! ldmia r9!, {r0-r7} /* read vector */ ! stmia r8!, {r0-r7} /* write vector */ ! ldmia r9!, {r0-r4} /* read jump table */ ! stmia r8!, {r0-r4} /* write jump table */ ! /* ! * chip select and remap ! */ ! ldr r12, =after_remap_start ! /* r1 = EBI_BASE(0xffe00000) */ ! mov r1, #(0xff << 24) ! orr r1, r1, #(0xe0 << 16) ! /* Flash ROM 0x10000000- */ ! mov r2, #0x10000000 ! orr r2, r2, #(0x20 << 8) ! orr r2, r2, #(0xb1) ! str r2, [r1, #0x00] ! /* SRAM 0x20000000- */ ! mov r2, #0x20000000 ! orr r2, r2, #(0x30 << 8) ! orr r2, r2, #(0xa9) ! str r2, [r1, #0x04] ! /* Ethernet 0x40000000- */ ! mov r2, #0x40000000 ! orr r2, r2, #(0x20 << 8) ! orr r2, r2, #(0x35) ! str r2, [r1, #0x1c] ! /* remap */ ! mov r2, #1 ! str r2, [r1, #EBI_RCR] ! mov pc, r12 ! /* -------- From here, address space after remap --------------------- */ ! after_remap_start: - .section .ftext.2,"ax" - .code 32 - .align 0 - - #if USE_PROTECT_MODE - ldr r1, =SF_BASE - ldr r2, =PMRKEY - orr r2, r2, #(1 << 5) - str r2, [r1, #SF_PMR] - #endif - init_stacks: ldr r1, =EXCEPTION_STACK_TOP #if ABT_STACK_SIZE != 0 --- 55,136 ---- b reserved_vector /* reserved */ .global irq_vector irq_vector: ! b knl_irq_handler /* IRQ */ .global fiq_vector fiq_vector: ! b fiq_vector /* FIQ: no support XXX */ + .pool + /* * Start up routine */ ! .section .text .code 32 .align 0 .global start start: msr cpsr, #(PSR_SVC|PSR_DI) ! // board setup code ---------------------------------------------------------- ! mov r0, #0 ! mov r1, #1 ! memmap_init: // remap vector area (boot loader -> user flash) ! ldr r2, =MEMMAP ! str r1, [r2] ! pll_init: // setup PLL ! ldr r4, =PLLCON ! mov r5, #0x55 ! mov r6, #0xaa ! ldr r2, [r4, #0x08] // PLLSTAT ! tst r2, #(1 << 25) ! // PLL is connected: disconnect now ! strne r1, [r4, #0x00] // PLLCON=1 (PLL enable/disconnect) ! strne r6, [r4, #0x0c] // PLLFEED=0xaa ! strne r5, [r4, #0x0c] // PLLFEED=0x55 ! str r0, [r4, #0x00] // PLLCON=0 (PLL disable/disconnect) ! str r6, [r4, #0x0c] // PLLFEED=0xaa ! str r5, [r4, #0x0c] // PLLFEED=0x55 ! ldr r2, =CLKSRCSEL // clock source: internal RC-OSC, 4MHz ! str r0, [r2] ! mov r2, #((2 - 1) << 16) // Fcco = (2 x M x Fin) / N ! orr r2, r2, #(72 - 1) // 288MHz = (2 x 72 x 4MHz) / 2 ! str r2, [r4, #0x04] // PLLCFG ! str r6, [r4, #0x0c] // PLLFEED=0xaa ! str r5, [r4, #0x0c] // PLLFEED=0x55 + str r1, [r4, #0x00] // PLLCON=1 (PLL enable/disconnect) + str r6, [r4, #0x0c] // PLLFEED=0xaa + str r5, [r4, #0x0c] // PLLFEED=0x55 ! pll_wait: ! ldr r2, [r4, #0x08] // PLLSTAT ! tst r2, #(1 << 26) ! beq pll_wait // wait for lock ! ldr r2, =CCLKCFG // CPU Clock: PLL clock / 4 ! mov r3, #(4 - 1) ! str r3, [r2] ! mov r3, #3 ! str r3, [r4, #0x00] // PLLCON=3 (PLL enable/connect) ! str r6, [r4, #0x0c] // PLLFEED=0xaa ! str r5, [r4, #0x0c] // PLLFEED=0x55 ! pclk_init: // setup PCLK ! ldr r2, =PCLKSEL0 // PCLK=CCLK/4 (LPC23xx) ! str r0, [r2, #0x00] // PCLKSEL0 ! str r0, [r2, #0x04] // PCLKSEL1 + // --------------------------------------------------------------------------- init_stacks: ldr r1, =EXCEPTION_STACK_TOP #if ABT_STACK_SIZE != 0 *************** *** 208,223 **** msr cpsr, #(PSR_SVC|PSR_DI) mov sp, r1 ! #if USE_TMONITOR ! ldr r0, =tm_init ! mov lr, pc ! bx r0 ! #endif - .section .romtext.2,"ax" - .code 32 - .align 0 - /* .data */ ldr r8, =__data_org /* src address */ ldr r9, =__data_start /* dst address */ --- 159,166 ---- msr cpsr, #(PSR_SVC|PSR_DI) mov sp, r1 ! // UART setup is moved to devinit.c:knl_init_device() // /* .data */ ldr r8, =__data_org /* src address */ ldr r9, =__data_start /* dst address */ *************** *** 233,242 **** data_done: - .section .ftext.3,"ax" - .code 32 - .align 0 - #if USE_NOINIT ldr r9, =__noinit_end /* dst address */ #else --- 176,181 ---- *************** *** 274,292 **** l_end: b l_end - #if USE_TMONITOR - tm_init: - /* TC0, TC1, TC2 clock enable */ - ldr r1, =APMC_BASE - mov r2, #(7 << 6) - str r2, [r1, #APMC_PCER] - - /* initialize serial I/O */ - ldr r0, =sio_init - bx r0 - /* return directly to the place tm_init called from sio_init */ - #endif - swi_handler: str lr, [sp, #-4]! str ip, [sp, #-4]! --- 213,218 ---- *************** *** 306,325 **** sub lr, lr, #4 stmfd sp!, {lr} /* sp-> lr_xxx */ - #if USE_PROTECT_MODE - ldr lr, =AIC_BASE - str lr, [lr, #AIC_IVR] - #else - ldr lr, =AIC_BASE - ldr lr, [lr, #AIC_IVR] - #endif - stmfd sp!, {ip} /* sp-> ip, lr_xxx */ mrs ip, spsr stmfd sp!, {ip} /* sp-> spsr_xxx, ip, lr_xxx */ stmfd sp!, {r3} /* sp-> r3, spsr_xxx, ip, lr_xxx */ ! ldr lr, =(AIC_BASE | AIC_ISR) ldr lr, [lr] /* lr := IRQ No. */ ldr ip, =Csym(knl_intvec) /* exception vector table */ add ip, ip, lr, LSL #2 /* ip := &vector[IRQ No.] */ --- 232,243 ---- sub lr, lr, #4 stmfd sp!, {lr} /* sp-> lr_xxx */ stmfd sp!, {ip} /* sp-> ip, lr_xxx */ mrs ip, spsr stmfd sp!, {ip} /* sp-> spsr_xxx, ip, lr_xxx */ stmfd sp!, {r3} /* sp-> r3, spsr_xxx, ip, lr_xxx */ ! ldr lr, =VICAddress ldr lr, [lr] /* lr := IRQ No. */ ldr ip, =Csym(knl_intvec) /* exception vector table */ add ip, ip, lr, LSL #2 /* ip := &vector[IRQ No.] */ *************** *** 327,330 **** mov lr, pc bx r3 ! --- 245,248 ---- mov lr, pc bx r3 ! .pool diff -Ncr utkernel_source.orig/kernel/sysdepend/device/app_at91/tkdev_conf.h utkernel_source.curr/kernel/sysdepend/device/app_at91/tkdev_conf.h *** utkernel_source.orig/kernel/sysdepend/device/app_at91/tkdev_conf.h Tue Feb 12 17:18:50 2008 --- utkernel_source.curr/kernel/sysdepend/device/app_at91/tkdev_conf.h Mon Mar 16 21:05:27 2009 *************** *** 13,19 **** */ /* ! * tkdev_conf.h (AT91) * Target System Configuration */ --- 13,19 ---- */ /* ! * tkdev_conf.h * Target System Configuration */ *************** *** 37,54 **** /* * memories */ - #define EXCEPTION_STACK_TOP INTERNAL_RAM_END - #define APPLICATION_STACK_TOP EXTERNAL_RAM_END - #define TMP_STACK_SZ (128) - - - - #define TMCLK 16 /* Timer clock input (MHz) */ - - /* - * Timer interrupt level - */ - #define TIMER_INTLEVEL 0 #endif /* _TKDEV_CONF_ */ --- 37,42 ---- diff -Ncr utkernel_source.orig/kernel/sysdepend/device/app_at91/tkdev_init.c utkernel_source.curr/kernel/sysdepend/device/app_at91/tkdev_init.c *** utkernel_source.orig/kernel/sysdepend/device/app_at91/tkdev_init.c Tue Feb 12 17:18:50 2008 --- utkernel_source.curr/kernel/sysdepend/device/app_at91/tkdev_init.c Mon Mar 16 21:11:51 2009 *************** *** 13,19 **** */ /* ! * tkdev_init.c (AT91) * micro T-Kernel Device-Dependent Initialization/Finalization */ --- 13,19 ---- */ /* ! * tkdev_init.c (LPC2388) * micro T-Kernel Device-Dependent Initialization/Finalization */ *************** *** 22,36 **** #include #include - EXPORT UW knl_TimerClkDiv; /* Dividing rate of timer clock */ - /* * Target system-dependent initialization */ EXPORT ER knl_tkdev_initialize( void ) { ! out_w(AIC_BASE | AIC_IDCR, 0xffffffff); /* disable */ ! out_w(AIC_BASE | AIC_ICCR, 0xffffffff); /* clear */ return E_OK; } --- 22,40 ---- #include #include /* * Target system-dependent initialization */ EXPORT ER knl_tkdev_initialize( void ) { ! W i; ! ! out_w(VICIntEnClr, ~0); // disable all interrupt ! out_w(VICSoftIntClear, ~0); // disable all s/w interrupt ! out_w(VICIntSelect, 0); // all interrupt: IRQ ! out_w(VICSWPriorityMask, 0xffff); // setup interrupt mask ! ! for (i = 0; i < 32; i++) out_w(VICVectAddr(i), i); return E_OK; } diff -Ncr utkernel_source.orig/kernel/sysdepend/device/app_at91/tkdev_timer.h utkernel_source.curr/kernel/sysdepend/device/app_at91/tkdev_timer.h *** utkernel_source.orig/kernel/sysdepend/device/app_at91/tkdev_timer.h Tue Feb 12 17:18:50 2008 --- utkernel_source.curr/kernel/sysdepend/device/app_at91/tkdev_timer.h Sat Mar 21 20:35:09 2009 *************** *** 13,19 **** */ /* ! * tkdev_timer.h (AT91) * Hardware-Dependent Timer Processing */ --- 13,19 ---- */ /* ! * tkdev_timer.h (LPC2388) * Hardware-Dependent Timer Processing */ *************** *** 38,75 **** #define MIN_TIMER_PERIOD 1 #define MAX_TIMER_PERIOD 50 ! IMPORT UW knl_TimerClkDiv; /* Dividing rate of timer clock */ /* * Set timer */ Inline void knl_init_hw_timer( void ) { - UW n, mode; UINT imask; - UW channel = TCB0_BASE | TC_C0; - /* Determine dividing rate */ - n = (UW)CFN_TIMER_PERIOD * (TMCLK * 1000) / 65536; - mode = ( n < 2 )? (knl_TimerClkDiv = 2, TC_CLKS_MCK2 ): /* 2 dividing */ - ( n < 8 )? (knl_TimerClkDiv = 8, TC_CLKS_MCK8 ): /* 8 dividing */ - (knl_TimerClkDiv = 32, TC_CLKS_MCK32); /* 32 dividing */ - mode |= TC_CPCTRG; - DI(imask); ! /* Set timer mode/Stop timer */ ! out_w(channel | TC_CCR, TC_CLKDIS); ! out_w(channel | TC_CMR, mode); ! /* Set counter */ ! n = (UW)(CFN_TIMER_PERIOD * (TMCLK * 1000) / knl_TimerClkDiv - 1); ! out_w(channel | TC_RC, n); ! out_w(channel | TC_IER, 1 << 4); /* Start timer count */ ! out_w(channel | TC_CCR, TC_SWTRG | TC_CLKEN); EI(imask); } --- 38,99 ---- #define MIN_TIMER_PERIOD 1 #define MAX_TIMER_PERIOD 50 ! /* ! * Timer definition ! */ ! #define TimerBase 0xe0004000 // Timer0 + #define TnIR (TimerBase + 0x0000) + #define TnTCR (TimerBase + 0x0004) + #define TnTC (TimerBase + 0x0008) + #define TnPR (TimerBase + 0x000c) + #define TnPC (TimerBase + 0x0010) + #define TnMCR (TimerBase + 0x0014) + #define TnMR0 (TimerBase + 0x0018) + #define TnMR1 (TimerBase + 0x001c) + #define TnMR2 (TimerBase + 0x0020) + #define TnMR3 (TimerBase + 0x0024) + #define TnCCR (TimerBase + 0x0028) + #define TnCR0 (TimerBase + 0x002c) + #define TnCR1 (TimerBase + 0x0030) + #define TnCR2 (TimerBase + 0x0034) + #define TnCR3 (TimerBase + 0x0038) + #define TnEMR (TimerBase + 0x003c) + #define TnCTCR (TimerBase + 0x0070) + + #define TimerIntVec 4 + #define TimerIntPri 5 /* 0 (highest) ... 15 (lowest) */ + /* * Set timer */ Inline void knl_init_hw_timer( void ) { UINT imask; DI(imask); ! /* Power-up timer */ ! out_w(PCONP, in_w(PCONP) | (1 << 1)); ! /* Stop timer */ ! out_w(TnTCR, 0); ! /* Set timer mode */ ! out_w(TnCTCR, 0); // timer mode ! out_w(TnEMR, 0); // external match: do nothing ! out_w(TnCCR, 0); // capture control: all disable ! out_w(TnPR, 0); // prescaler: PCLK/1 + /* Set counter */ + out_w(TnMR0, (CPU_CLOCK / (1000 * 4)) * CFN_TIMER_PERIOD - 1); + out_w(TnPC, 0); // reset prescale count + out_w(TnTC, 0); // reset timer count + out_w(TnIR, 0xff); // clear all interrupts + out_w(TnMCR, 3); // interrupt enable, reset on MR + /* Start timer count */ ! out_w(TnTCR, 1); EI(imask); } *************** *** 86,96 **** knl_init_hw_timer(); /* Interrupt handler definition */ ! knl_define_inthdr(TC0IRQ, knl_timer_handler_startup); /* Timer interrupt enable */ ! SetIntMode(TC0IRQ, IM_LEVEL|IM_HI); ! EnableInt(TC0IRQ); } /* --- 110,119 ---- knl_init_hw_timer(); /* Interrupt handler definition */ ! knl_define_inthdr(TimerIntVec, knl_timer_handler_startup); /* Timer interrupt enable */ ! EnableInt(TimerIntVec, TimerIntPri); } /* *************** *** 106,119 **** */ Inline void knl_clear_hw_timer_interrupt( void ) { - _UW dummy; /* Enter on interrupt enable state */ /* Disable its own interrupt to enable a multiplexed interrupt */ ! out_w(AIC_BASE | AIC_IDCR, 1 << 6); /* Timer 0 disable */ /* Clear timer interrupt */ ! dummy = in_w(TCB0_BASE | TC_C0 | TC_SR); /* Multiplexed interrupt enable */ ENAINT; --- 129,141 ---- */ Inline void knl_clear_hw_timer_interrupt( void ) { /* Enter on interrupt enable state */ /* Disable its own interrupt to enable a multiplexed interrupt */ ! out_w(VICIntEnClr, 1 << TimerIntVec); /* Clear timer interrupt */ ! out_w(TnIR, 0xff); /* Multiplexed interrupt enable */ ENAINT; *************** *** 124,133 **** /* Interrupt disable */ DISINT; ! out_w(AIC_BASE | AIC_EOICR, 1); /* Enable its own interrupt */ ! out_w(AIC_BASE | AIC_IECR, 1 << 6); /* Timer 0 enable */ } /* --- 146,155 ---- /* Interrupt disable */ DISINT; ! out_w(VICAddress, 0); // issue EOI /* Enable its own interrupt */ ! out_w(VICIntEnable, 1 << TimerIntVec); } /* *************** *** 138,144 **** Inline void knl_terminate_hw_timer( void ) { /* Timer interrupt disable */ ! DisableInt(TC0IRQ); } /* --- 160,166 ---- Inline void knl_terminate_hw_timer( void ) { /* Timer interrupt disable */ ! DisableInt(TimerIntVec); } /* *************** *** 151,173 **** */ Inline UW knl_get_hw_timer_nsec( void ) { ! UW ofs, max, unf; ! UINT imask; ! ! DI(imask); ! ! max = (in_w(TCB0_BASE | TC_C0 | TC_RC) & 0xffff) + 1; ! do { ! unf = in_w(AIC_BASE | AIC_IPR) & (1U << 6); ! ofs = in_w(TCB0_BASE | TC_C0 | TC_CVR) & 0xffffU; ! } while ( unf != (in_w(AIC_BASE | AIC_IPR) & (1U << 6)) ); ! if ( unf != 0 ) { ! ofs += max; ! } ! ! EI(imask); ! ! return ofs * (1000 * knl_TimerClkDiv) / TMCLK; } #endif /* _TKDEV_TIMER_ */ --- 173,180 ---- */ Inline UW knl_get_hw_timer_nsec( void ) { ! // XXX not supported ! return 0; } #endif /* _TKDEV_TIMER_ */ diff -Ncr utkernel_source.orig/kernel/sysmain/build/app_at91/kernel-ram.lnk utkernel_source.curr/kernel/sysmain/build/app_at91/kernel-ram.lnk *** utkernel_source.orig/kernel/sysmain/build/app_at91/kernel-ram.lnk Tue Feb 12 17:18:51 2008 --- utkernel_source.curr/kernel/sysmain/build/app_at91/kernel-ram.lnk Wed Mar 18 22:57:09 2009 *************** *** 13,54 **** */ /* ! * kernel-ram.lnk (sysmain, AT91M55800A) * linker script (RAM) */ OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") OUTPUT_ARCH(arm) ! SECTIONS ! { ! .init 0x00000000 : { *(.vector) ! *(.ftext) ! *(.ftext.*) } ! ! .text 0x20000000 : { *(.text) *(.rodata) ! } =0 __data_org = . ; ! .data : { __data_start = . ; *(.data) __data_end = .; ! } ! .bss : { __bss_start = .; PROVIDE (__noinit_start = .); *(.noinit) PROVIDE (__noinit_end = .); *(.bss) *(COMMON) __bss_end = .; ! } ! ! /DISCARD/ : { ! *(.romtext.*) ! } } --- 13,93 ---- */ /* ! * kernel-ram.lnk (sysmain, LPC2388) * linker script (RAM) + * + * For this target, RAM version is not available. */ OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") OUTPUT_ARCH(arm) ! SECTIONS { ! . = 0x00000000; ! __vector_org = . ; ! .vector : { ! __vector_start = . ; *(.vector) ! . = ALIGN(4); ! __vector_end = . ; } ! . = 0x00000040; ! .text : { ! KEEP (*(.init)) *(.text) + *(.text.*) + *(.stub) + KEEP (*(.fini)) + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); *(.rodata) ! *(.rodata.*) ! *(.rodata1) ! . = ALIGN(0x10); ! } =0 __data_org = . ; ! .data 0x40000000 : AT(__data_org) { __data_start = . ; *(.data) + *(.data.*) + SORT(CONSTRUCTORS) + *(.data1) + KEEP (*(.eh_frame)) + *(.gcc_except_table) + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + *(.sdata) + *(.sdata.*) + . = ALIGN(4); __data_end = .; ! _edata = .; ! PROVIDE (edata = .); ! } ! .bss ALIGN(4) : { __bss_start = .; PROVIDE (__noinit_start = .); *(.noinit) PROVIDE (__noinit_end = .); + PROVIDE (__sbss_start = .); + PROVIDE (___sbss_start = .); + *(.sbss) + *(.sbss.*) + *(.scommon) + PROVIDE (__sbss_end = .); + PROVIDE (___sbss_end = .); *(.bss) + *(.bss.*) *(COMMON) + . = ALIGN(4); __bss_end = .; ! _end = .; ! PROVIDE (end = .); ! } } diff -Ncr utkernel_source.orig/kernel/sysmain/build/app_at91/kernel-rom.lnk utkernel_source.curr/kernel/sysmain/build/app_at91/kernel-rom.lnk *** utkernel_source.orig/kernel/sysmain/build/app_at91/kernel-rom.lnk Tue Feb 12 17:18:51 2008 --- utkernel_source.curr/kernel/sysmain/build/app_at91/kernel-rom.lnk Wed Mar 18 22:57:03 2009 *************** *** 13,19 **** */ /* ! * kernel-rom.lnk (sysmain, AT9155800A) * linker script (ROM) */ --- 13,19 ---- */ /* ! * kernel-rom.lnk (sysmain, LPC2388) * linker script (ROM) */ *************** *** 21,53 **** OUTPUT_ARCH(arm) SECTIONS { ! .text 0x10000000 : AT(0x10000000) { *(.vector) ! *(.ftext) ! *(.ftext.1) ! *(.romtext.1) ! *(.ftext.2) ! *(.romtext.2) ! *(.ftext.3) ! *(.text) *(.rodata) ! } = 0 ! __data_org = .; ! .data 0x20000000 : AT(__data_org) { ! __data_start = .; *(.data) __data_end = .; ! } ! .bss : { __bss_start = .; PROVIDE (__noinit_start = .); *(.noinit) PROVIDE (__noinit_end = .); *(.bss) *(COMMON) __bss_end = .; ! __end = .; ! } } - --- 21,91 ---- OUTPUT_ARCH(arm) SECTIONS { ! . = 0x00000000; ! __vector_org = . ; ! .vector : { ! __vector_start = . ; *(.vector) ! . = ALIGN(4); ! __vector_end = . ; ! } ! . = 0x00000040; ! .text : { ! KEEP (*(.init)) *(.text) + *(.text.*) + *(.stub) + KEEP (*(.fini)) + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); *(.rodata) ! *(.rodata.*) ! *(.rodata1) ! . = ALIGN(0x10); ! } =0 ! __data_org = . ; ! .data 0x40000000 : AT(__data_org) { ! __data_start = . ; *(.data) + *(.data.*) + SORT(CONSTRUCTORS) + *(.data1) + KEEP (*(.eh_frame)) + *(.gcc_except_table) + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o ) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o ) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + *(.sdata) + *(.sdata.*) + . = ALIGN(4); __data_end = .; ! _edata = .; ! PROVIDE (edata = .); ! } ! .bss ALIGN(4) : { __bss_start = .; PROVIDE (__noinit_start = .); *(.noinit) PROVIDE (__noinit_end = .); + PROVIDE (__sbss_start = .); + PROVIDE (___sbss_start = .); + *(.sbss) + *(.sbss.*) + *(.scommon) + PROVIDE (__sbss_end = .); + PROVIDE (___sbss_end = .); *(.bss) + *(.bss.*) *(COMMON) + . = ALIGN(4); __bss_end = .; ! _end = .; ! PROVIDE (end = .); ! } } diff -Ncr utkernel_source.orig/kernel/sysmain/src/Makefile.common utkernel_source.curr/kernel/sysmain/src/Makefile.common *** utkernel_source.orig/kernel/sysmain/src/Makefile.common Tue Feb 12 17:18:52 2008 --- utkernel_source.curr/kernel/sysmain/src/Makefile.common Sat Feb 28 21:36:12 2009 *************** *** 121,134 **** $(OBJCOPY) $(OUTPUT_SREC) $< $@ tkernel: ! ( cd $(OBJ_TKERNEL_PATH) ; make source ; make) sysinit: ! ( cd $(OBJ_SYSINIT_PATH) ; make ) tstdlib: ! make tstdlib_source ! make tstdlib_obj tstdlib_source: $(TSTDLIB_ORGSRC) (cd $(TSTDLIB_S); \ --- 121,134 ---- $(OBJCOPY) $(OUTPUT_SREC) $< $@ tkernel: ! ( cd $(OBJ_TKERNEL_PATH) ; $(MAKE) source ; $(MAKE)) sysinit: ! ( cd $(OBJ_SYSINIT_PATH) ; $(MAKE) ) tstdlib: ! $(MAKE) tstdlib_source ! $(MAKE) tstdlib_obj tstdlib_source: $(TSTDLIB_ORGSRC) (cd $(TSTDLIB_S); \ *************** *** 145,157 **** endif lib: ! (cd $(LIBRARY_PATH); make) clean: clean_source ! ( cd $(OBJ_TKERNEL_PATH) ; make clean clean_source) ! ( cd $(OBJ_SYSINIT_PATH) ; make clean ) $(RM) $(OBJ) $(TARGET_CRT0) $(TSTDLIB_OBJ) $(TSTDLIB_TARGET) $(ALL) $(DEPS) ! ( cd $(LIBRARY_PATH) ; make clean) clean_source: (cd $(TSTDLIB_S)/func ; $(RM) $(TSTDLIB_FUNCSRC)) --- 145,157 ---- endif lib: ! (cd $(LIBRARY_PATH); $(MAKE)) clean: clean_source ! ( cd $(OBJ_TKERNEL_PATH) ; $(MAKE) clean clean_source) ! ( cd $(OBJ_SYSINIT_PATH) ; $(MAKE) clean ) $(RM) $(OBJ) $(TARGET_CRT0) $(TSTDLIB_OBJ) $(TSTDLIB_TARGET) $(ALL) $(DEPS) ! ( cd $(LIBRARY_PATH) ; $(MAKE) clean) clean_source: (cd $(TSTDLIB_S)/func ; $(RM) $(TSTDLIB_FUNCSRC)) diff -Ncr utkernel_source.orig/lib/build/Makefile.common utkernel_source.curr/lib/build/Makefile.common *** utkernel_source.orig/lib/build/Makefile.common Tue Feb 12 17:18:57 2008 --- utkernel_source.curr/lib/build/Makefile.common Sat Feb 28 21:35:38 2009 *************** *** 28,47 **** $(LIB_SYSDEP_TARGET): cd ../../$@/build/$(TETYPE)_$(MACHINE) ; \ ! make ; \ ! make install $(LIB_CPUDEP_TARGET): cd ../../$@/build/$(MACHINE) ; \ ! make ; \ ! make install clean: @( cd ../.. ; \ for dir in $(LIB_SYSDEP_TARGET); do \ ! ( cd $$dir/build/$(TETYPE)_$(MACHINE) ; make clean ) ; \ done ; \ for dir in $(LIB_CPUDEP_TARGET); do \ ! ( cd $$dir/build/$(MACHINE) ; make clean ) ; \ done ) ; rm -rf $(addsuffix .a, $(LIB_ARCHIVE_OBJ)) *.o \#*.o.* \#*.a.* --- 28,47 ---- $(LIB_SYSDEP_TARGET): cd ../../$@/build/$(TETYPE)_$(MACHINE) ; \ ! $(MAKE) ; \ ! $(MAKE) install $(LIB_CPUDEP_TARGET): cd ../../$@/build/$(MACHINE) ; \ ! $(MAKE) ; \ ! $(MAKE) install clean: @( cd ../.. ; \ for dir in $(LIB_SYSDEP_TARGET); do \ ! ( cd $$dir/build/$(TETYPE)_$(MACHINE) ; $(MAKE) clean ) ; \ done ; \ for dir in $(LIB_CPUDEP_TARGET); do \ ! ( cd $$dir/build/$(MACHINE) ; $(MAKE) clean ) ; \ done ) ; rm -rf $(addsuffix .a, $(LIB_ARCHIVE_OBJ)) *.o \#*.o.* \#*.a.* diff -Ncr utkernel_source.orig/lib/libstr/src/Makefile.common utkernel_source.curr/lib/libstr/src/Makefile.common *** utkernel_source.orig/lib/libstr/src/Makefile.common Tue Feb 12 17:18:57 2008 --- utkernel_source.curr/lib/libstr/src/Makefile.common Sat Feb 28 21:35:18 2009 *************** *** 57,64 **** ALL = $(TARGET) all: ! make source ! make obj obj: $(ALL) --- 57,64 ---- ALL = $(TARGET) all: ! $(MAKE) source ! $(MAKE) obj obj: $(ALL) diff -Ncr utkernel_source.orig/lib/libtk/src/Makefile.common utkernel_source.curr/lib/libtk/src/Makefile.common *** utkernel_source.orig/lib/libtk/src/Makefile.common Tue Feb 12 17:19:19 2008 --- utkernel_source.curr/lib/libtk/src/Makefile.common Sat Feb 28 21:34:59 2009 *************** *** 60,67 **** ALL = $(TARGET) all: ! make source ! make obj obj: $(ALL) --- 60,67 ---- ALL = $(TARGET) all: ! $(MAKE) source ! $(MAKE) obj obj: $(ALL) diff -Ncr utkernel_source.orig/lib/libtk/src/sysdepend/app_at91/int.c utkernel_source.curr/lib/libtk/src/sysdepend/app_at91/int.c *** utkernel_source.orig/lib/libtk/src/sysdepend/app_at91/int.c Tue Feb 12 17:19:19 2008 --- utkernel_source.curr/lib/libtk/src/sysdepend/app_at91/int.c Mon Mar 16 22:08:33 2009 *************** *** 13,19 **** */ /* ! * @(#)int.c (libtk/AT91) * * Interrupt controller */ --- 13,19 ---- */ /* ! * @(#)int.c (libtk/LPC2388) * * Interrupt controller */ *************** *** 23,63 **** #include /* - * Set interrupt mode - * - * Sets the interrupt specified in 'intvec' to the mode specified - * in 'mode'. - * FIQ and IRQ interrupt can be specified. - * Interrupt controller level register and polarity register are set. - * - * mode := (IM_LEVEL || IM_EDGE) | (IM_HI || IM_LOW) - */ - EXPORT void SetIntMode( INTVEC intvec, UINT mode ) - { - UINT imask; - _UW *reg = (_UW*)(AIC_BASE + intvec*4); /* AIC_SMRn */ - - DI(imask); - - /* Keep interrupt controller level register - * and modify polarity register */ - *reg = (mode << 5) | (*reg & 0x07U); - - EI(imask); - } - - /* * Enable interrupt * Enables the interrupt specified in intvec. ! * FIQ and IRQ interrupt can be specified. */ ! EXPORT void EnableInt( INTVEC intvec ) { UINT imask; DI(imask); ! *(_UW*)(AIC_BASE | AIC_IECR) = (0x01U << intvec); EI(imask); } --- 23,40 ---- #include /* * Enable interrupt * Enables the interrupt specified in intvec. ! * intpri is interrupt priority, 0 (Highest) ... 15 (Lowest). */ ! EXPORT void EnableInt( INTVEC intvec, INT intpri ) { UINT imask; DI(imask); ! out_w(VICVectPriority(intvec), intpri); ! out_w(VICIntEnable, 1 << intvec); EI(imask); } *************** *** 65,106 **** /* * Disable interrupt * Disables the interrupt specified in intvec. - * FIQ and IRQ interrupt can be specified. */ EXPORT void DisableInt( INTVEC intvec ) { ! UINT imask; ! ! DI(imask); ! ! *(_UW*)(AIC_BASE | AIC_IDCR) = (0x01U << intvec); ! ! EI(imask); } /* - * Clear interrupt request - * Clears the intvec interrupt request. - * Valid only for edge trigger. - * For edge trigger, the interrupt must be cleared with an - * interrupt handler. - * FIQ and IRQ interrupt can be specified. - */ - EXPORT void ClearInt( INTVEC intvec ) - { - *(_UW*)(AIC_BASE | AIC_ICCR) = (0x01U << intvec); - } - - /* * Check for interrupt requests * Checks for intvec interrupt requests. * If an interrupt request is found, returns TRUE (other than 0). - * FIQ and IRQ interrupt can be specified. */ EXPORT BOOL CheckInt( INTVEC intvec ) { if (intvec < 32) { ! return (BOOL)((*(_UW*)(AIC_BASE | AIC_IPR) & (0x01U << intvec)) != 0); } return FALSE; --- 42,62 ---- /* * Disable interrupt * Disables the interrupt specified in intvec. */ EXPORT void DisableInt( INTVEC intvec ) { ! out_w(VICIntEnClr, 1 << intvec); } /* * Check for interrupt requests * Checks for intvec interrupt requests. * If an interrupt request is found, returns TRUE (other than 0). */ EXPORT BOOL CheckInt( INTVEC intvec ) { if (intvec < 32) { ! return (BOOL)((in_w(VICRawIntr) & (1 << intvec)) != 0); } return FALSE; *************** *** 112,116 **** EXPORT void EndOfInt( INTVEC intvec ) { /* write anything to notify */ ! *(_UW*)(AIC_BASE | AIC_EOICR) = 0x01; } --- 68,95 ---- EXPORT void EndOfInt( INTVEC intvec ) { /* write anything to notify */ ! out_w(VICAddress, 0); ! } ! ! /* ! * Interrupt priority mask ! * Masks all interrupts which have equal or lower priority. ! * intpri is priority mask, 0 ... 16. ! * 0/16 masks/unmasks all interrupts, 7 masks priority 7 ... 15. ! * Return value is old priority mask (intpri value). ! */ ! EXPORT INT SetIntLevel( INT intpri ) ! { ! UINT imask, pmask; ! INT lv; ! ! DI(imask); ! ! pmask = in_w(VICSWPriorityMask) & 0xffff; ! out_w(VICSWPriorityMask, 0xffff >> (16 - intpri)); ! ! EI(imask); ! ! for (lv = 0; ; lv++, pmask >>= 1) if (!pmask) break; ! return lv; } diff -Ncr utkernel_source.orig/lib/libtm/build/app_at91/Makefile utkernel_source.curr/lib/libtm/build/app_at91/Makefile *** utkernel_source.orig/lib/libtm/build/app_at91/Makefile Tue Feb 12 17:19:19 2008 --- utkernel_source.curr/lib/libtm/build/app_at91/Makefile Sun Mar 15 21:13:09 2009 *************** *** 25,31 **** include ../../../../etc/makerules # source files (system-dependent) ! SRC = sio.S # include main makefile (common description) include ../../src/Makefile.common --- 25,31 ---- include ../../../../etc/makerules # source files (system-dependent) ! SRC = sio.c # include main makefile (common description) include ../../src/Makefile.common diff -Ncr utkernel_source.orig/lib/libtm/src/sysdepend/app_at91/sio.c utkernel_source.curr/lib/libtm/src/sysdepend/app_at91/sio.c *** utkernel_source.orig/lib/libtm/src/sysdepend/app_at91/sio.c Thu Jan 1 09:00:00 1970 --- utkernel_source.curr/lib/libtm/src/sysdepend/app_at91/sio.c Wed Mar 18 22:56:23 2009 *************** *** 0 **** --- 1,78 ---- + // --- public domain, no warranty. + + #include + + #define uartBase 0xe000c000 + #define uartStep 0x04 + #define uartClock (CPU_CLOCK / 4) // Hz + #define uartSpeed 38400 // bps + #define uartDivisor (uartClock / (uartSpeed * 16)) + Inline UW uartRead(UW adr) {return *(_UW*)adr;} + Inline void uartWrite(UW adr, UW dat) {*(_UW*)adr = dat;} + + #define RHR (uartBase + (0x00 * uartStep)) // r + #define THR (uartBase + (0x00 * uartStep)) // w + #define IER (uartBase + (0x01 * uartStep)) // rw + #define ISR (uartBase + (0x02 * uartStep)) // r + #define FCR (uartBase + (0x02 * uartStep)) // w + #define LCR (uartBase + (0x03 * uartStep)) // rw + #define MCR (uartBase + (0x04 * uartStep)) // rw + #define LSR (uartBase + (0x05 * uartStep)) // r + + #define DLL (uartBase + (0x00 * uartStep)) // rw + #define DLM (uartBase + (0x01 * uartStep)) // rw + + /* LPC23XX specific: pin selection, power control */ + #define PCONP ((_UW*)0xe01fc0c4) + #define PINSEL0 ((_UW*)0xe002c000) + + + int sio_send_frame(const unsigned char *buf, int size) + { + int i; + + for (i = 0; i < size; i++) { + while(!(uartRead(LSR) & 0x20)); // wait for Tx ready + uartWrite(THR, *buf++); + } + + return i; + } + + int sio_recv_frame(unsigned char* buf, int size) + { + int i, s, c; + + for (i = 0; i < size; i++) { + while (1) { + s = uartRead(LSR); // get status + if (s & 0x1f) { // Rx ready + c = uartRead(RHR); // read from FIFO + if (!(s & 0x1e)) { // no error + *buf++ = c; + break; + } + } + } + } + + return i; + } + + void sio_init(void) + { + *PCONP |= (1 << 3); // UART0 power-up + *PINSEL0 = (*PINSEL0 & ~(0x0f << 4)) | (0x05 << 4); + // TXD0/RXD0 enable + + uartWrite(IER, 0x00); // disable interrupt + uartWrite(LCR, 0x80); // set divisor + uartWrite(DLM, 0xff); // (avoid divisor=0) + uartWrite(DLL, (uartDivisor >> 0) & 0xff); + uartWrite(DLM, (uartDivisor >> 8) & 0xff); + uartWrite(LCR, 0x03); // data 8bit, stop 1bit, non-parity + uartWrite(MCR, 0x03); // RTS#, DTR# assert + uartWrite(FCR, 0x07); // FIFO enable and reset + + return; + }