diff -uNpr utkernel_source.orig/config/sysdepend/app_mb9af312k/utk_config_depend.h utkernel_source/config/sysdepend/app_mb9af312k/utk_config_depend.h --- utkernel_source.orig/config/sysdepend/app_mb9af312k/utk_config_depend.h Fri May 10 10:31:26 2013 +++ utkernel_source/config/sysdepend/app_mb9af312k/utk_config_depend.h Fri Sep 20 05:30:43 2013 @@ -25,33 +25,33 @@ /* RAMINFO */ -#define SYSTEMAREA_TOP 0x1FFFE000 /* RAM system area top */ -#define SYSTEMAREA_END 0x20002000 /* RAM system area end */ +#define SYSTEMAREA_TOP 0x10000000 /* RAM system area top */ +#define SYSTEMAREA_END 0x10002000 /* RAM system area end */ /* User definition */ -#define RI_USERAREA_TOP 0x1FFFE000 /* RAM user area top */ +#define RI_USERAREA_TOP 0x10000000 /* RAM user area top */ #define RI_USERINIT NULL /* User initialization program */ /* SYSCONF */ #define CFN_TIMER_PERIOD 10 -#define CFN_MAX_TSKID 32 -#define CFN_MAX_SEMID 16 -#define CFN_MAX_FLGID 16 -#define CFN_MAX_MBXID 8 -#define CFN_MAX_MTXID 2 -#define CFN_MAX_MBFID 8 -#define CFN_MAX_PORID 4 -#define CFN_MAX_MPLID 2 -#define CFN_MAX_MPFID 8 -#define CFN_MAX_CYCID 4 -#define CFN_MAX_ALMID 8 -#define CFN_MAX_SSYID 4 -#define CFN_MAX_SSYPRI 16 +#define CFN_MAX_TSKID 2 +#define CFN_MAX_SEMID 1 +#define CFN_MAX_FLGID 1 +#define CFN_MAX_MBXID 1 +#define CFN_MAX_MTXID 0 +#define CFN_MAX_MBFID 0 +#define CFN_MAX_PORID 0 +#define CFN_MAX_MPLID 0 +#define CFN_MAX_MPFID 0 +#define CFN_MAX_CYCID 0 +#define CFN_MAX_ALMID 0 +#define CFN_MAX_SSYID 0 +#define CFN_MAX_SSYPRI 0 -#define CFN_MAX_REGDEV (8) -#define CFN_MAX_OPNDEV (16) -#define CFN_MAX_REQDEV (16) +#define CFN_MAX_REGDEV (0) +#define CFN_MAX_OPNDEV (0) +#define CFN_MAX_REQDEV (0) #define CFN_DEVT_MBFSZ0 (-1) #define CFN_DEVT_MBFSZ1 (-1) @@ -64,7 +64,7 @@ #define CFN_VER_PRNO3 0 #define CFN_VER_PRNO4 0 -#define CFN_REALMEMEND ((VP)0x20002000) +#define CFN_REALMEMEND ((VP)0x10002000) /* * Initial task priority diff -uNpr utkernel_source.orig/etc/mkfuncfiles utkernel_source/etc/mkfuncfiles --- utkernel_source.orig/etc/mkfuncfiles Fri May 10 10:31:28 2013 +++ utkernel_source/etc/mkfuncfiles Wed Sep 18 04:45:10 2013 @@ -1,4 +1,4 @@ -#! /usr/local/bin/perl +#! /usr/bin/env perl # # ---------------------------------------------------------------------- # micro T-Kernel diff -uNpr utkernel_source.orig/etc/mkiflib utkernel_source/etc/mkiflib --- utkernel_source.orig/etc/mkiflib Fri May 10 10:31:28 2013 +++ utkernel_source/etc/mkiflib Wed Sep 18 04:45:10 2013 @@ -1,4 +1,4 @@ -#! /usr/local/bin/perl +#! /usr/bin/env perl # # ---------------------------------------------------------------------- # micro T-Kernel diff -uNpr utkernel_source.orig/etc/mktdsvc utkernel_source/etc/mktdsvc --- utkernel_source.orig/etc/mktdsvc Fri May 10 10:31:28 2013 +++ utkernel_source/etc/mktdsvc Wed Sep 18 04:45:10 2013 @@ -1,4 +1,4 @@ -#! /usr/local/bin/perl +#! /usr/bin/env perl # # ---------------------------------------------------------------------- # micro T-Kernel diff -uNpr utkernel_source.orig/etc/mktksvc utkernel_source/etc/mktksvc --- utkernel_source.orig/etc/mktksvc Fri May 10 10:31:29 2013 +++ utkernel_source/etc/mktksvc Wed Sep 18 04:45:10 2013 @@ -1,4 +1,4 @@ -#! /usr/local/bin/perl +#! /usr/bin/env perl # # ---------------------------------------------------------------------- # micro T-Kernel diff -uNpr utkernel_source.orig/etc/platform utkernel_source/etc/platform --- utkernel_source.orig/etc/platform Fri May 10 10:31:29 2013 +++ utkernel_source/etc/platform Wed Sep 18 04:45:10 2013 @@ -20,6 +20,7 @@ case $os in SunOS) platform=$os-`uname -p` ;; Linux) platform=$os-`uname -m` ;; FreeBSD) platform=$os-`uname -p` ;; + OpenBSD) platform=$os-`uname -m` ;; CYGWIN*) platform="Cygwin-`uname -m`" ;; *) platform=unknown ;; esac diff -uNpr utkernel_source.orig/etc/sysdepend/app_mb9af312k/makerules.sysdepend utkernel_source/etc/sysdepend/app_mb9af312k/makerules.sysdepend --- utkernel_source.orig/etc/sysdepend/app_mb9af312k/makerules.sysdepend Fri May 10 10:31:30 2013 +++ utkernel_source/etc/sysdepend/app_mb9af312k/makerules.sysdepend Sat Sep 21 06:15:27 2013 @@ -56,6 +56,9 @@ endif ifneq ($(filter Linux-%, $(CROSS_ARCH)), ) PATH := $(PATH):/usr/local/bin:/bin:/usr/bin endif +ifneq ($(filter OpenBSD-%, $(CROSS_ARCH)), ) + PATH := $(PATH):/usr/local/bin:/bin:/usr/bin +endif ifneq ($(filter Cygwin-%, $(CROSS_ARCH)), ) PATH := $(PATH):/usr/local/bin:/bin:/usr/bin endif @@ -66,8 +69,8 @@ endif TARGET_ARCH = # target type -_CPUTYPE_FLAGS = -mcpu=cortex-m3 -_CPUTYPE_FLAGS_AS = -mcpu=cortex-m3 +_CPUTYPE_FLAGS = -march=armv6-m +_CPUTYPE_FLAGS_AS = -march=armv6-m _TE_SYSTEM_NAME_ = _APP_MB9AF312K_ # code set @@ -79,8 +82,11 @@ CPPFLAGS += ASFLAGS += LDFLAGS += +### CPU CLOCK (Hz) ### +CFLAGS += -DCPU_CLOCK=48000000UL + ### C ### -CC := $(GNUARM_2)/bin/gcc4arm +CC := $(GNUARM_2)/bin/$(TOOL_PREFIX)gcc OUTPUT_OPTION = -o $@ ifeq ($(mode), debug) CFLAGS += -g @@ -117,7 +123,7 @@ LINK.c = $(CC) $(TARGET_ARCH) $(CFLAGS) $(CPPFLAGS) $( $(CC) $(TARGET_ARCH) $(CFLAGS) $(CPPFLAGS) -E $< $(OUTPUT_OPTION) ### C++ ### -CXX := $(GNUARM_2)/bin/gcc4arm +CXX := $(GNUARM_2)/bin/$(TOOL_PREFIX)gcc CXXFLAGS = $(CFLAGS) COMPILE.cc = $(CXX) $(TARGET_ARCH) $(CXXFLAGS) $(CPPFLAGS) -c @@ -133,7 +139,7 @@ LINK.cc = $(CXX) $(TARGET_ARCH) $(CXXFLAGS) $(CPPFLAGS $(CXX) $(TARGET_ARCH) $(CXXFLAGS) $(CPPFLAGS) -E $< $(OUTPUT_OPTION) ### asm ### -AS = $(GNUARM_2)/bin/as +AS = $(GNUARM_2)/bin/$(TOOL_PREFIX)as ifeq ($(mode), debug) ASFLAGS += -g else @@ -156,7 +162,7 @@ COMPILE.s = $(AS) $(ASFLAGS.s) $(CC) $(TARGET_ARCH) $(ASFLAGS) $(CPPFLAGS) -E $< $(OUTPUT_OPTION) ### linker ### -LD = $(GNUARM_2)/bin/ld +LD = $(GNUARM_2)/bin/$(TOOL_PREFIX)ld ifeq ($(mode), debug) LDFLAGS += $(LIBDIR:%=-L%) else @@ -204,15 +210,15 @@ LOCATE.o = $(CC) $(TARGET_ARCH) $(LDFLAGS) -nostdlib $ $(RM) _$@ ### library ### -AR = $(GNUARM_2)/bin/ar +AR = $(GNUARM_2)/bin/$(TOOL_PREFIX)ar ARFLAGS = rv -RANLIB = $(GNUARM_2)/bin/ranlib +RANLIB = $(GNUARM_2)/bin/$(TOOL_PREFIX)ranlib (%): % $(AR) $(ARFLAGS) $@ $% ### create name list ### -NM = $(GNUARM_2)/bin/nm +NM = $(GNUARM_2)/bin/$(TOOL_PREFIX)nm NMFLAGS = -n %.map: % @@ -252,11 +258,10 @@ DATABOX = $(DB) $(DBFLAGS) ### other ### ifndef CPP - CPP = $(GNU_BD)/bin/arm_2-unknown-tkernel-cpp + CPP = $(GNUARM_2)/bin/$(TOOL_PREFIX)cpp endif -STRIP = $(GNUARM_2)/bin/strip --strip-unneeded +STRIP = $(GNUARM_2)/bin/$(TOOL_PREFIX)strip --strip-unneeded -#OBJCOPY = $(GNU_BD)/bin/arm_2-unknown-tkernel-objcopy -OBJCOPY = $(GNU_BD)/bin/arm-none-eabi-objcopy +OBJCOPY = $(GNUARM_2)/bin/$(TOOL_PREFIX)objcopy OUTPUT_SREC = -O srec --srec-forceS3 --srec-len 32 OUTPUT_BIN = -O binary diff -uNpr utkernel_source.orig/include/sys/sysdepend/app_mb9af312k/machine_depend.h utkernel_source/include/sys/sysdepend/app_mb9af312k/machine_depend.h --- utkernel_source.orig/include/sys/sysdepend/app_mb9af312k/machine_depend.h Fri May 10 10:31:36 2013 +++ utkernel_source/include/sys/sysdepend/app_mb9af312k/machine_depend.h Fri Sep 20 05:35:44 2013 @@ -40,10 +40,10 @@ #define _APP_MB9AF312K_ 1 -#define CPU_ARMV7_M 1 -#define CPU_ARM_CORTEX_M3 1 -#define CPU_MB9AF 1 -#define APP_MB9AF312K 1 +#define CPU_ARMV6_M 1 +#define CPU_ARM_CORTEX_M0 1 +#define CPU_LPC1114 1 +#define APP_MB9AF312K 1 // XXX #define ALLOW_MISALIGN 0 #define BIGENDIAN 0 #define VIRTUAL_ADDRESS 0 diff -uNpr utkernel_source.orig/include/sys/sysdepend/app_mb9af312k/sysinfo_depend.h utkernel_source/include/sys/sysdepend/app_mb9af312k/sysinfo_depend.h --- utkernel_source.orig/include/sys/sysdepend/app_mb9af312k/sysinfo_depend.h Fri May 10 10:31:36 2013 +++ utkernel_source/include/sys/sysdepend/app_mb9af312k/sysinfo_depend.h Fri Sep 20 05:33:54 2013 @@ -33,7 +33,7 @@ extern "C" { #ifndef _in_asm_source_ -#define N_INTVEC 48 +#define N_INTVEC 32 IMPORT FP knl_intvec[]; IMPORT W knl_taskindp; diff -uNpr utkernel_source.orig/include/tk/sysdepend/app_mb9af312k/sysdef_depend.h utkernel_source/include/tk/sysdepend/app_mb9af312k/sysdef_depend.h --- utkernel_source.orig/include/tk/sysdepend/app_mb9af312k/sysdef_depend.h Fri May 10 10:31:43 2013 +++ utkernel_source/include/tk/sysdepend/app_mb9af312k/sysdef_depend.h Sun Sep 22 04:13:30 2013 @@ -71,19 +71,16 @@ * System control block */ #define SCB_ICSR 0xE000ED04 -#define SCB_VTOR 0xE000ED08 #define SCB_AIRCR 0xE000ED0C #define SCB_SCR 0xE000ED10 #define SCB_CCR 0xE000ED14 -#define SCB_SHPR1 0xE000ED18 #define SCB_SHPR2 0xE000ED1C #define SCB_SHPR3 0xE000ED20 -#define SCB_STIR 0xE000EF00 - #define ICSR_PENDSVSET 0x10000000 /* Trigger PendSV exception. */ #define ICSR_PENDSVCLR 0x08000000 /* Remove the pending state from the PendSV exception. */ +#define ICSR_PENDSTCLR 0x02000000 /* Remove the pending state from the SysTick exception. */ /* * System Timer @@ -95,94 +92,8 @@ /* ------------------------------------------------------------------------ */ /* - * Clock Control - */ -/* Registers */ -#define FM3_CRG_BASE 0x40010000 -#define FM3_CRG_SCM_CTL (*(volatile UW*)(FM3_CRG_BASE + 0x00)) -#define FM3_CRG_SCM_STR (*(volatile UW*)(FM3_CRG_BASE + 0x04)) -#define FM3_CRG_STB_CTL (*(volatile UW*)(FM3_CRG_BASE + 0x08)) -#define FM3_CRG_RST_STR (*(volatile UW*)(FM3_CRG_BASE + 0x0C)) -#define FM3_CRG_BSC_PSR (*(volatile UW*)(FM3_CRG_BASE + 0x10)) -#define FM3_CRG_APBC0_PSR (*(volatile UW*)(FM3_CRG_BASE + 0x14)) -#define FM3_CRG_APBC1_PSR (*(volatile UW*)(FM3_CRG_BASE + 0x18)) -#define FM3_CRG_APBC2_PSR (*(volatile UW*)(FM3_CRG_BASE + 0x1C)) -#define FM3_CRG_SWC_PSR (*(volatile UW*)(FM3_CRG_BASE + 0x20)) -#define FM3_CRG_TTC_PSR (*(volatile UW*)(FM3_CRG_BASE + 0x28)) -#define FM3_CRG_CSW_TMR (*(volatile UW*)(FM3_CRG_BASE + 0x30)) -#define FM3_CRG_PSW_TMR (*(volatile UW*)(FM3_CRG_BASE + 0x34)) -#define FM3_CRG_PLL_CTL1 (*(volatile UW*)(FM3_CRG_BASE + 0x38)) -#define FM3_CRG_PLL_CTL2 (*(volatile UW*)(FM3_CRG_BASE + 0x3C)) -#define FM3_CRG_CSV_CTL (*(volatile UW*)(FM3_CRG_BASE + 0x40)) -#define FM3_CRG_CSV_STR (*(volatile UW*)(FM3_CRG_BASE + 0x44)) -#define FM3_CRG_FCSWH_CTL (*(volatile UW*)(FM3_CRG_BASE + 0x48)) -#define FM3_CRG_FCSWL_CTL (*(volatile UW*)(FM3_CRG_BASE + 0x4C)) -#define FM3_CRG_FCSWD_CTL (*(volatile UW*)(FM3_CRG_BASE + 0x50)) -#define FM3_CRG_DBWDT_CTL (*(volatile UW*)(FM3_CRG_BASE + 0x54)) -#define FM3_CRG_INT_ENR (*(volatile UW*)(FM3_CRG_BASE + 0x60)) -#define FM3_CRG_INT_STR (*(volatile UW*)(FM3_CRG_BASE + 0x64)) -#define FM3_CRG_INT_CLR (*(volatile UW*)(FM3_CRG_BASE + 0x68)) - -#define CLOCK_SETUP 1 -#define HWWD_DISABLE 1 -#define CR_TRIM_SETUP 1 -#define SCM_CTL_Val 0x00000052 -#define CSW_TMR_Val 0x0000005C -#define PSW_TMR_Val 0x00000000 -#define PLL_CTL1_Val 0x00000001 -#define PLL_CTL2_Val 0x00000009 -#define BSC_PSR_Val 0x00000000 -#define APBC0_PSR_Val 0x00000001 -#define APBC1_PSR_Val 0x00000081 -#define APBC2_PSR_Val 0x00000081 -#define SWC_PSR_Val 0x00000003 -#define TTC_PSR_Val 0x00000000 - -/* ------------------------------------------------------------------------ */ - -/* - * Flash interface - */ -/* Registers */ -#define FM3_FLASH_IF_BASE 0x40000000 -#define FM3_FLASH_IF_FASZR (*(volatile UW*)(FM3_FLASH_IF_BASE + 0x00)) -#define FM3_FLASH_IF_FRWTR (*(volatile UW*)(FM3_FLASH_IF_BASE + 0x04)) -#define FM3_FLASH_IF_FSTR (*(volatile UW*)(FM3_FLASH_IF_BASE + 0x08)) -#define FM3_FLASH_IF_FSYNDN (*(volatile UW*)(FM3_FLASH_IF_BASE + 0x10)) -#define FM3_FLASH_IF_CRTRMM (*(volatile UW*)(FM3_FLASH_IF_BASE + 0xFC)) - -/* ------------------------------------------------------------------------ */ - -/* - * Hardware watchdog - */ -/* Registers */ -#define FM3_HWWDT_BASE 0x40011000 -#define FM3_HWWDT_WDG_LDR (*(volatile UW*)(FM3_HWWDT_BASE + 0x00)) -#define FM3_HWWDT_WDG_VLR (*(volatile UW*)(FM3_HWWDT_BASE + 0x04)) -#define FM3_HWWDT_WDG_CTL (*(volatile UW*)(FM3_HWWDT_BASE + 0x08)) -#define FM3_HWWDT_WDG_ICL (*(volatile UW*)(FM3_HWWDT_BASE + 0x0C)) -#define FM3_HWWDT_WDG_RIS (*(volatile UW*)(FM3_HWWDT_BASE + 0x10)) -#define FM3_HWWDT_WDG_LCK (*(volatile UW*)(FM3_HWWDT_BASE + 0xC00)) - -/* ------------------------------------------------------------------------ */ - -/* - * CR trimming - */ -/* Registers */ -#define FM3_CRTRIM_BASE 0x4002E000 -#define FM3_CRTRIM_MCR_PSR (*(volatile UW*)(FM3_CRTRIM_BASE + 0x00)) -#define FM3_CRTRIM_MCR_FTRM (*(volatile UW*)(FM3_CRTRIM_BASE + 0x04)) -#define FM3_CRTRIM_MCR_RLR (*(volatile UW*)(FM3_CRTRIM_BASE + 0x0C)) - -/* ------------------------------------------------------------------------ */ - -/* * NVIC (Nested Vectored Interrupt Controller) */ -#define NVIC_ICTR 0xE000E004 - #define NVIC_ISER_BASE 0xE000E100 #define NVIC_ISER(x) (NVIC_ISER_BASE + (((x) / 32) << 2)) @@ -195,9 +106,6 @@ #define NVIC_ICPR_BASE 0xE000E280 #define NVIC_ICPR(x) (NVIC_ICPR_BASE + (((x) / 32) << 2)) -#define NVIC_IABR_BASE 0xE000E300 -#define NVIC_IABR(x) (NVIC_IABR_BASE + (((x) / 32) << 2)) - #define NVIC_IPR_BASE 0xE000E400 #define NVIC_IPR(x) (NVIC_IPR_BASE + (((x) / 4) << 2)) @@ -206,16 +114,8 @@ /* * force dispatch interrupt for micro T-Kernel */ -#define INTNO_FORCE_DISPATCH 47 +#define INTNO_FORCE_DISPATCH 27 #define NVIC_IPR_FORCE_DISPATCH NVIC_IPR(INTNO_FORCE_DISPATCH) - -/* - * External interrupt - */ -#define INTNO_IRQ 46 -#define NVIC_IPR_IRQ NVIC_IPR(INTNO_IRQ) - -#define MAX_EXTINT_PRI 0x10 /* ------------------------------------------------------------------------ */ diff -uNpr utkernel_source.orig/include/tk/sysdepend/app_mb9af312k/syslib_depend.h utkernel_source/include/tk/sysdepend/app_mb9af312k/syslib_depend.h --- utkernel_source.orig/include/tk/sysdepend/app_mb9af312k/syslib_depend.h Fri May 10 10:31:43 2013 +++ utkernel_source/include/tk/sysdepend/app_mb9af312k/syslib_depend.h Fri Sep 20 05:37:35 2013 @@ -37,7 +37,7 @@ extern "C" { * CPU interrupt control * As armv7-m architecture does not support disable interrupt in * xpsr register, we have to raise the excution priority to - * that the interrupt group have. Write the BASEPRI to implement + * that the interrupt group have. Write the PRIMASK to implement * disint and enaint. */ IMPORT UINT disint( void ); diff -uNpr utkernel_source.orig/kernel/sysdepend/cpu/mb9af312k/clock_mode.c utkernel_source/kernel/sysdepend/cpu/mb9af312k/clock_mode.c --- utkernel_source.orig/kernel/sysdepend/cpu/mb9af312k/clock_mode.c Fri May 10 10:31:51 2013 +++ utkernel_source/kernel/sysdepend/cpu/mb9af312k/clock_mode.c Mon Sep 23 03:02:57 2013 @@ -1,90 +1,71 @@ -/* - *---------------------------------------------------------------------- - * UCT micro T-Kernel DevKit tuned for FM3. - * - * Copyright (c) 2011-2013 UC Technology. All Rights Reserved. - *---------------------------------------------------------------------- - * - * Version: 1.00.00 - * Released by UC Technology (http://www.uctec.com/) at 2013/05/13. - * - *---------------------------------------------------------------------- - */ +// original code by Takayoshi SASANO +// this code is licensed under NYSL 0.9982, http://www.kmonos.net/nysl/NYSL.TXT -/* - * Clock Setting (MB9BF506R) - */ - #include #include "hwconfig.h" #include "utk_config.h" #include -#include /* * Clock Settings: * --------------- - * Crystal: 4 MHz - * HCLK: 40 MHz - * PCLK0: 20 MHz + * IRC oscillator: 12MHz + * Fcco: 192MHz + * FCLKOUT: 48MHz * PCLK1: 20 MHz * PCLK2: 20 MHz */ + +#define SYSCONBase 0x40048000 +#define SYSMEMREMAP ((_UW *)(SYSCONBase + 0x000)) +#define SYSPLLCTRL ((_UW *)(SYSCONBase + 0x008)) +#define SYSPLLSTAT ((_UW *)(SYSCONBase + 0x00c)) +#define SYSPLLCLKSEL ((_UW *)(SYSCONBase + 0x040)) +#define SYSPLLCLKUEN ((_UW *)(SYSCONBase + 0x044)) +#define MAINCLKSEL ((_UW *)(SYSCONBase + 0x070)) +#define MAINCLKUEN ((_UW *)(SYSCONBase + 0x074)) +#define AHBCLKCTRL ((_UW *)(SYSCONBase + 0x080)) +#define PDRUNCFG ((_UW *)(SYSCONBase + 0x238)) + EXPORT void init_clock_control(void) { - UINT u32RegisterRead; + /* User Flash Mode, disable interrupt vector remap */ + *SYSMEMREMAP = 0x02; -#if (HWWD_DISABLE) /* HW Watchdog Disable */ - FM3_HWWDT_WDG_LCK = 0x1ACCE551; /* HW Watchdog Unlock */ - FM3_HWWDT_WDG_LCK = 0xE5331AAE; - FM3_HWWDT_WDG_CTL = 0; /* HW Watchdog stop */ -#endif + /* main clock: IRC oscillator */ + *MAINCLKSEL = 0x00; + *MAINCLKUEN = 0x00; + *MAINCLKUEN = 0x01; -#if (CLOCK_SETUP) /* Clock Setup */ - FM3_CRG_BSC_PSR = BSC_PSR_Val; /* set System Clock presacaler */ - FM3_CRG_APBC0_PSR = APBC0_PSR_Val; /* set APB0 presacaler */ - FM3_CRG_APBC1_PSR = APBC1_PSR_Val; /* set APB1 presacaler */ - FM3_CRG_APBC2_PSR = APBC2_PSR_Val; /* set APB2 presacaler */ - FM3_CRG_SWC_PSR = SWC_PSR_Val | (1UL << 7); /* set SW Watchdog presacaler */ - FM3_CRG_TTC_PSR = TTC_PSR_Val; /* set Trace Clock presacaler */ + /* System PLL: power-up */ + *PDRUNCFG &= ~0x80; - FM3_CRG_CSW_TMR = CSW_TMR_Val; /* set oscillation stabilization wait time */ - if (SCM_CTL_Val & (1UL << 1)) { /* Main clock oscillator enabled ? */ - FM3_CRG_SCM_CTL |= (1UL << 1); /* enable main oscillator */ - while (!(FM3_CRG_SCM_STR & (1UL << 1))); /* wait for Main clock oscillation stable */ - } - if (SCM_CTL_Val & (1UL << 3)) { /* Sub clock oscillator enabled ? */ - FM3_CRG_SCM_CTL |= (1UL << 3); /* enable sub oscillator */ - while (!(FM3_CRG_SCM_STR & (1UL << 3))); /* wait for Sub clock oscillation stable */ - } + /* PLL clock source: IRC oscillator */ + *SYSPLLCLKSEL = 0x00; + *SYSPLLCLKUEN = 0x00; + *SYSPLLCLKUEN = 0x01; - FM3_CRG_PSW_TMR = PSW_TMR_Val; /* set PLL stabilization wait time */ - FM3_CRG_PLL_CTL1 = PLL_CTL1_Val; /* set PLLM and PLLK */ - FM3_CRG_PLL_CTL2 = PLL_CTL2_Val; /* set PLLN */ - if (SCM_CTL_Val & (1UL << 4)) { /* PLL enabled ? */ - FM3_CRG_SCM_CTL |= (1UL << 4); /* enable PLL */ - while (!(FM3_CRG_SCM_STR & (1UL << 4))); /* wait for PLL stable */ - } + /* + * Fcco = 2 x P x FCLKOUT + * 192MHz = 2 x 2 x 48MHz + * M = FCLKOUT / FCLKIN + * 4 = 48MHz / 12MHz + */ + *SYSPLLCTRL = 0x23; - FM3_CRG_SCM_CTL |= (SCM_CTL_Val & 0xE0); /* Set Master Clock switch */ - do - { - u32RegisterRead = (FM3_CRG_SCM_CTL & 0xE0); - }while ((FM3_CRG_SCM_STR & 0xE0) != u32RegisterRead); -#endif + /* wait for PLL is lock */ + while (!(*SYSPLLSTAT & 0x01)); -#if (CR_TRIM_SETUP) - /* CR Trimming Data */ - if (0x000003FF != (FM3_FLASH_IF_CRTRMM & 0x000003FF)) { - /* UnLock (MCR_FTRM) */ - FM3_CRTRIM_MCR_RLR = 0x1ACCE554; - /* Set MCR_FTRM */ - FM3_CRTRIM_MCR_FTRM = FM3_FLASH_IF_CRTRMM; - /* Lock (MCR_FTRM) */ - FM3_CRTRIM_MCR_RLR = 0x00000000; - } -#endif + /* main clock: system PLL */ + *MAINCLKSEL = 0x03; + *MAINCLKUEN = 0x00; + *MAINCLKUEN = 0x01; + + /* enable IOCON clock */ + *AHBCLKCTRL |= 0x00010000; + + return; } diff -uNpr utkernel_source.orig/kernel/sysdepend/cpu/mb9af312k/cpu_insn.h utkernel_source/kernel/sysdepend/cpu/mb9af312k/cpu_insn.h --- utkernel_source.orig/kernel/sysdepend/cpu/mb9af312k/cpu_insn.h Fri May 10 10:31:52 2013 +++ utkernel_source/kernel/sysdepend/cpu/mb9af312k/cpu_insn.h Thu Sep 19 08:55:57 2013 @@ -33,10 +33,24 @@ * Control register operation */ -IMPORT UINT knl_getXPSR(void); -IMPORT UINT knl_getBASEPRI(void); -IMPORT UINT knl_getPRIMASK(void); +Inline UINT knl_getXPSR(void) +{ + UINT xpsr; + Asm("mrs %0, xpsr": "=r"(xpsr)); + + return xpsr; +} + +Inline UINT knl_getPRIMASK(void) +{ + UINT primask; + + Asm("mrs %0, primask": "=r"(primask)); + + return primask; +} + /* ------------------------------------------------------------------------ */ /* * EIT-related @@ -48,7 +62,7 @@ IMPORT UINT knl_getPRIMASK(void); */ Inline void knl_define_inthdr( INT vecno, FP inthdr ) { - knl_intvec[vecno] = inthdr; + /* do nothing */ } /* diff -uNpr utkernel_source.orig/kernel/sysdepend/cpu/mb9af312k/cpu_status.h utkernel_source/kernel/sysdepend/cpu/mb9af312k/cpu_status.h --- utkernel_source.orig/kernel/sysdepend/cpu/mb9af312k/cpu_status.h Fri May 10 10:31:52 2013 +++ utkernel_source/kernel/sysdepend/cpu/mb9af312k/cpu_status.h Wed Sep 18 04:45:10 2013 @@ -33,19 +33,19 @@ /* * Start/End critical section */ -#define BEGIN_CRITICAL_SECTION { UINT _basepri_ = disint(); -#define END_CRITICAL_SECTION if ( !isDI(_basepri_) \ +#define BEGIN_CRITICAL_SECTION { UINT _primask_ = disint(); +#define END_CRITICAL_SECTION if ( !isDI(_primask_) \ && knl_ctxtsk != knl_schedtsk \ && !knl_dispatch_disabled ) { \ knl_dispatch(); \ } \ - enaint(_basepri_); } + enaint(_primask_); } /* * Start/End interrupt disable section */ -#define BEGIN_DISABLE_INTERRUPT { UINT _basepri_ = disint(); -#define END_DISABLE_INTERRUPT enaint(_basepri_); } +#define BEGIN_DISABLE_INTERRUPT { UINT _primask_ = disint(); +#define END_DISABLE_INTERRUPT enaint(_primask_); } /* * Interrupt enable/disable @@ -81,13 +81,13 @@ */ #define in_ddsp() ( knl_dispatch_disabled \ || in_indp() \ - || isDI(knl_getBASEPRI()) ) + || isDI(knl_getPRIMASK()) ) /* * When a system call is called during CPU lock (interrupt disable), TRUE * Also include the task independent part as during CPU lock. */ -#define in_loc() ( isDI(knl_getBASEPRI()) \ +#define in_loc() ( isDI(knl_getPRIMASK()) \ || in_indp() ) /* diff -uNpr utkernel_source.orig/kernel/sysdepend/cpu/mb9af312k/cpu_support.S utkernel_source/kernel/sysdepend/cpu/mb9af312k/cpu_support.S --- utkernel_source.orig/kernel/sysdepend/cpu/mb9af312k/cpu_support.S Fri May 10 10:31:53 2013 +++ utkernel_source/kernel/sysdepend/cpu/mb9af312k/cpu_support.S Fri Sep 20 08:02:29 2013 @@ -33,8 +33,8 @@ #include #include -#if USE_TRAP | (USE_DBGSPT & USE_HOOK_TRACE) -#include "isysconf.h" +#if USE_TRAP | USE_DBGSPT | USE_HOOK_TRACE +#error ouch! #endif #include "tkdev_conf.h" @@ -75,24 +75,21 @@ .globl Csym(knl_dispatch_to_schedtsk) Csym(knl_dispatch_to_schedtsk): /* Interrupt is disabled(CPSR.I=1 F=1), during SVC mode */ - ldr sp, =TMP_STACK_TOP /* Set temporal stack */ + ldr r0, =TMP_STACK_TOP /* Set temporal stack */ + mov sp, r0 - ldr ip, =Csym(knl_dispatch_disabled) - ldr r0, =1 - str r0, [ip] /* Dispatch disable */ + ldr r3, =Csym(knl_dispatch_disabled) + movs r0, #1 + str r0, [r3] /* Dispatch disable */ ldr r4, =Csym(knl_ctxtsk) /* R4 = &ctxtsk */ - ldr r0, =0 -#if USE_DBGSPT - ldr r8, [r4] -#endif - + movs r0, #0 str r0, [r4] /* ctxtsk = NULL */ /* Clear the pending state from the PendSV exception */ ldr r0, =SCB_ICSR - ldr ip, =ICSR_PENDSVCLR - str ip, [r0] + ldr r3, =ICSR_PENDSVCLR + str r3, [r0] b l_dispatch0 @@ -101,168 +98,83 @@ Csym(knl_dispatch_to_schedtsk): .globl Csym(knl_dispatch_entry) Csym(knl_dispatch_entry): _ret_int_dispatch: - stmfd sp!, {lr} /* Context save (lr) */ - ldr r0, =Csym(knl_dispatch_disabled) - ldr r1, =1 + movs r1, #1 str r1, [r0] /* Dispatch disable */ - ldr lr, =Csym(knl_taskmode) - ldr lr, [lr] - stmfd sp!, {r4-r11, lr} + ldr r0, =Csym(knl_taskmode) + ldr r0, [r0] + push {r0, lr} /* Context save (lr) */ + mov r0, r8 + mov r1, r9 + mov r2, r10 + mov r3, r11 + push {r0-r3} + push {r4-r7} + /* Context save */ ldr r4, =Csym(knl_ctxtsk) /* R4 = &ctxtsk */ - ldr r0, =0 - ldr r8, [r4] - cmp r8, #0 - it ne - strne sp, [r8, #TCB_tskctxb + CTXB_ssp] /* Save 'ssp' to TCB */ + movs r0, #0 + ldr r7, [r4] + cmp r7, #0 + beq 0f + mov r1, sp + str r1, [r7, #TCB_tskctxb + CTXB_ssp] /* Save 'ssp' to TCB */ +0: str r0, [r4] /* ctxtsk = NULL */ l_dispatch0: - -#if USE_DBGSPT & USE_HOOK_TRACE - ldr ip, =hook_stop_jmp /* Hook processing */ - ldr pc, [ip] - - .thumb_func -ret_hook_stop: -#endif - ldr r5, =Csym(knl_schedtsk) /* R5 = &schedtsk */ ldr r6, =Csym(knl_lowpow_discnt) /* R6 = &lowpow_discnt */ l_dispatch1: - ldr r0, =MAX_EXTINT_PRI - msr basepri, r0 + cpsid i - ldr r8, [r5] /* R8 = schedtsk */ - cmp r8, #0 /* Is there 'schedtsk'? */ + ldr r7, [r5] /* R7 = schedtsk */ + cmp r7, #0 /* Is there 'schedtsk'? */ bne l_dispatch2 /* Because there is no task that should be executed, move to the power-saving mode */ - ldr ip, [r6] /* Is 'low_pow' disabled? */ - cmp ip, #0 - it eq - bleq Csym(knl_low_pow) /* call low_pow() */ - - ldr r0, =0 - msr basepri, r0 - + ldr r3, [r6] /* Is 'low_pow' disabled? */ + cmp r3, #0 + cpsie i + bne 1f + wfi /* do low_pow() */ +1: b l_dispatch1 l_dispatch2: /* Switch to 'schedtsk' */ - str r8, [r4] /* ctxtsk = schedtsk */ - ldr sp, [r8, #TCB_tskctxb + CTXB_ssp] /* Restore 'ssp' from TCB */ + str r7, [r4] /* ctxtsk = schedtsk */ + ldr r1, [r7, #TCB_tskctxb + CTXB_ssp] /* Restore 'ssp' from TCB */ + mov sp, r1 -#if USE_DBGSPT & USE_HOOK_TRACE - ldr ip, =hook_exec_jmp /* Hook processing */ - ldr pc, [ip] - - .thumb_func -ret_hook_exec: -#endif - ldr r0, =Csym(knl_dispatch_disabled) - ldr r1, =0 + movs r1, #0 str r1, [r0] /* Dispatch enable */ - ldmfd sp!, {r4-r11, lr} + pop {r4-r7} + pop {r0-r3} + mov r8, r0 + mov r9, r1 + mov r10, r2 + mov r11, r3 + + pop {r0, r3} ldr r1, =Csym(knl_taskmode) - str lr, [r1] + str r0, [r1] - ldmfd sp!, {lr} /* R14_svc restore */ + mov lr, r3 /* R14_svc restore */ - ldr r0, =0 - msr basepri, r0 + cpsie i - mrs r0, basepri - EXC_RETURN - -#if USE_DBGSPT & USE_HOOK_TRACE -/* - * Task dispatcher hook routine call - * void stop( ID tskid, INT lsid, UINT tskstat ) - * void exec( ID tskid, INT lsid ) - */ - .text - .align 2 - .thumb_func -hook_stop: - cmp r8, #0 /* r8 = ctxtsk */ - beq l_notask - - ldrb r2, [r8, #TCB_state] /* tskstat */ - mov r2, r2, lsl #1 - ldr r0, [r8, #TCB_tskid] /* tskid */ - - ldr ip, =Csym(knl_hook_stopfn) - ldr ip, [ip] - blx ip /* call stop(tskid, lsid, tskstat) */ - -l_notask: - b ret_hook_stop - - .thumb_func -hook_exec: - /* r8 = ctxtsk */ - ldr r0, [r8, #TCB_tskid] /* tskid */ - - ldr ip, =Csym(knl_hook_execfn) - ldr ip, [ip] - blx ip /* call exec(tskid, lsid) */ - - b ret_hook_exec - -/* - * Set/Free task dispatcher hook routine - */ - .text - .align 2 - .thumb - .thumb_func - .global Csym(knl_hook_dsp) -Csym(knl_hook_dsp): - ldr r0, =hook_exec_jmp - ldr r1, =hook_stop_jmp - ldr r2, =hook_exec - ldr r3, =hook_stop - str r2, [r0] - str r3, [r1] - bx lr - - .thumb - .thumb_func - .global Csym(knl_unhook_dsp) -Csym(knl_unhook_dsp): - ldr r0, =hook_exec_jmp - ldr r1, =hook_stop_jmp - ldr r2, =ret_hook_exec - ldr r3, =ret_hook_stop - str r2, [r0] - str r3, [r1] - bx lr - - .data - .align 2 -hook_exec_jmp: .long ret_hook_exec -hook_stop_jmp: .long ret_hook_stop - -#endif /* USE_DBGSPT & USE_HOOK_TRACE */ - - #if USE_HLL_INTHDR /* ------------------------------------------------------------------------ */ /* * High level programming language routine for interrupt handler * Called by interrupt entry routine. - * - * The vector table address is set in 'ip.' - * (ip - EIT_VECTBL) / 4 = Vector number - * */ .text .align 2 @@ -270,112 +182,30 @@ hook_stop_jmp: .long ret_hook_stop .thumb_func .globl Csym(knl_inthdr_startup) Csym(knl_inthdr_startup): - push {lr} /* push EXC_RETURN value to stack */ + push {r2, lr} /* push EXC_RETURN value to stack */ - ldr ip, =Csym(knl_taskindp) /* Task independent part */ - ldr r1, [ip] - add r1, r1, #1 - str r1, [ip] + ldr r3, =Csym(knl_taskindp) /* Task independent part */ + ldr r1, [r3] + adds r1, r1, #1 + str r1, [r3] mrs r0, ipsr - sub r0, r0, #16 /* interrupt number (dintno) */ + subs r0, r0, #16 /* interrupt number (dintno) */ -#if USE_DBGSPT & USE_HOOK_TRACE - ldr ip, =hook_ienter_jmp - ldr pc, [ip] + ldr r3, =Csym(knl_hll_inthdr) + lsls r1, r0, #2 + ldr r3, [r3, r1] + blx r3 /* call hll_inthdr[n](dintno) */ - .thumb_func -ret_hook_ienter: -#endif + ldr r3, =Csym(knl_taskindp) + ldr r2, [r3] + subs r2, r2, #1 + str r2, [r3] - ldr ip, =Csym(knl_hll_inthdr) - lsl r1, r0, #2 - ldr ip, [ip, r1] - blx ip /* call hll_inthdr[n](dintno) */ + pop {r2, pc} /* pop EXC_RETURN value from stack */ -#if USE_DBGSPT & USE_HOOK_TRACE - ldr ip, =hook_ileave_jmp - ldr pc, [ip] - - .thumb_func -ret_hook_ileave: -#endif - - ldr ip, =Csym(knl_taskindp) - ldr r2, [ip] - sub r2, r2, #1 - str r2, [ip] - - pop {lr} /* pop EXC_RETURN value from stack */ - - EXC_RETURN - - -#if USE_DBGSPT & USE_HOOK_TRACE -/* - * Interrupt handler hook routine call - */ - .text - .align 2 - .thumb_func -hook_ienter: - stmfd sp!, {r0, r1} /* Register save */ - stmfd sp!, {r3} - - ldr ip, =Csym(knl_hook_ienterfn) - ldr ip, [ip] - blx ip /* call enter(dintno, sp) */ - - ldmfd sp!, {r3} /* Register restore */ - ldmfd sp, {r0, r1} /* Leave 'dintno,' 'sp' on stack */ - b ret_hook_ienter - - .thumb_func -hook_ileave: - ldmfd sp!, {r0, r1} /* Restore 'dintno,' 'sp' */ - - ldr ip, =Csym(knl_hook_ileavefn) - ldr ip, [ip] - blx ip /* call leave(dintno, info) */ - - b ret_hook_ileave - -/* - * Set/Free interrupt handler hook routine - */ - .thumb - .thumb_func - .globl Csym(knl_hook_int) -Csym(knl_hook_int): - ldr r0, =hook_ienter_jmp - ldr r1, =hook_ileave_jmp - ldr r2, =hook_ienter - ldr r3, =hook_ileave - str r2, [r0] - str r3, [r1] - bx lr - - .thumb - .thumb_func - .globl Csym(knl_unhook_int) -Csym(knl_unhook_int): - ldr r0, =hook_ienter_jmp - ldr r1, =hook_ileave_jmp - ldr r2, =ret_hook_ienter - ldr r3, =ret_hook_ileave - str r2, [r0] - str r3, [r1] - bx lr - - .data - .align 2 -hook_ienter_jmp: .long ret_hook_ienter -hook_ileave_jmp: .long ret_hook_ileave - -#endif /* USE_DBGSPT & USE_HOOK_TRACE */ #endif /* USE_HLL_INTHDR */ - /* * tk_ret_int_impl() */ @@ -388,368 +218,7 @@ Csym(tk_ret_int_impl): EXC_RETURN /* ------------------------------------------------------------------------ */ - -#if USE_TRAP | USE_DBGSPT | (CFN_MAX_SSYID > 0) /* - * Unsupported system call - */ - .text - .align 2 - .thumb - .thumb_func - .globl Csym(knl_no_support) -Csym(knl_no_support): - ldr r0, =E_RSFN - bx lr - -/* - * System call entry table - */ -#if USE_TRAP | (USE_DBGSPT & USE_HOOK_TRACE) - .text - .align 2 -_svctbl: - .int Csym(knl_no_support) -#define tk_ret_int_impl knl_no_support -#include -#undef tk_ret_int_impl -#endif /* USE_TRAP */ - -/* - * System call entry - * Do not need to save the temporary register. - * The compiler saves the permanent register. - * - * +---------------+ - * | xPSR | - * | Return Address| - * | lr | - * | ip | - * | r3 | Function code - * | r2 | - * | r1 | Addressof(svc #0) + 1 - * | r0 | - * sp -> +---------------+ - */ - .text - .align 2 - .thumb - .thumb_func - .globl Csym(knl_svcall_entry) -Csym(knl_svcall_entry): - tst lr, #0x4 /* Test EXC_RETURN number in LR bit 2 */ - ite eq - mrseq r1, msp /* Main stack */ - mrsne r1, psp /* Process stack */ - - /* Get Parameter of SVC instruction */ - ldr r2, [r1, #24] - ldrb r1, [r2, #-2] - - ldr r0, svcall_exc_ret - - cmp r1, #SVC_SYSCALL - it eq - ldreq r0, =knl_call_entry - - cmp r1, #SVC_EXTENDED_SVC - it eq - ldreq r0, =Csym(knl_call_entry) - -#if USE_DBGSPT & (USE_TRAP | USE_HOOK_TRACE) - cmp r1, #SVC_DEBUG_SUPPORT - it eq - ldreq r0, =Csym(knl_call_dbgspt) -#endif - - ldr r2, =svcall_exc_ret - cmp r0, r2 - ittt eq - ldreq r2, =E_RSFN - streq r2, [sp] - beq svcall_exc_ret - - ldr r1, [sp, #24] - orr r1, r1, #0x00000001 - str r1, [sp, #20] - - str r0, [sp, #24] - -svcall_exc_ret: - EXC_RETURN - - .thumb - .thumb_func - .globl Csym(knl_call_entry) -Csym(knl_call_entry): - - stmfd sp!, {r0-r7, ip, lr} - - /* Load func code */ - add r5, sp, #8*4 - - ldr ip, =Csym(knl_taskmode) /* Task mode flag update */ - ldr r7, [ip] - stmfd sp!, {r7} /* taskmode save */ - mov r6, sp /* Save stack pointer */ - mov lr, r7, lsl #16 - str lr, [ip] - -#if USE_DBGSPT & USE_HOOK_TRACE - ldr ip, =hook_enter_jmp /* Hook processing */ - ldr pc, [ip] - - .thumb_func -ret_hook_enter: -#endif - - ldr ip, [r5] - cmp ip, #0 /* < 0: System call */ - bge l_esvc_function /* >= 0: Extended SVC */ - -#if USE_TRAP | (USE_DBGSPT & USE_HOOK_TRACE) - - /* micro T-Kernel System Call */ - mov r2, ip, asr #16 /* r2 = Function number */ - ldr r1, =N_TFN + 0xffff8000 - cmp r2, r1 - bgt l_illegal_svc - - mov ip, ip, lsr #8 - and ip, ip, #0xff /* ip = Number of arguments */ - cmp ip, #5 - bne l_nocopy - ldr ip, [r4] /* Copy fifth argument */ - stmfd sp!, {ip} -l_nocopy: - - ldr ip, =_svctbl - (0xffff8000 << 2) - add r4, ip, r2, lsl #2 - add ip, r6, #4 - ldmfd ip, {r0, r1, r2, r3} - ldr r4, [r4] /* r4 = system call address */ - blx r4 -#else - b l_illegal_svc -#endif - -l_retsvc: - -#if USE_DBGSPT & USE_HOOK_TRACE - ldr ip, =hook_leave_jmp /* Hook processing */ - ldr pc, [ip] - - .thumb_func -ret_hook_leave: -#endif - - mov sp, r6 - ldmfd sp!, {ip} /* Restore register for work */ - - ldr r4, =Csym(knl_taskmode) /* Task mode restore */ - str ip, [r4] - - add sp, sp, #16 - ldmfd sp!, {r4-r7, ip, lr} - - EXC_RETURN - -l_illegal_svc: - ldr r0, =E_RSFN - b l_retsvc - -l_esvc_function: - -#if CFN_MAX_SSYID > 0 - /* Extended SVC */ - ldr r1, [r5] /* r1 = Function code */ - bl Csym(knl_svc_ientry) /* svc_ientry(pk_para, fncd) */ - b l_retsvc -#else - ldr r0, =E_SYS - b l_retsvc -#endif /* CFN_MAX_SSYID > 0 */ - - -#if USE_DBGSPT & USE_HOOK_TRACE -/* - * System call/Extended SVC hook routine call - * VP enter( FN fncd, TD_CALINF *calinf, ... ) - * void leave( FN fncd, INT ret, VP exinf ) - * - * typedef struct td_calinf { - * VP ssp; System stack pointer - * VP r11; Flame pointer when calling - * } TD_CALINF; - */ - .text - .align 2 - - .thumb - .thumb_func -hook_enter: - stmfd sp!, {r0-r3, r8-r10} /* Save argument and register for work */ - mov r8, sp /* r8 = Keep stack position */ - - mov ip, r5 /* Create TD_CALINF */ - stmfd sp!, {r5, ip} - mov r9, sp /* r9 = &TD_CALINF */ - - ldr ip, [r5] /* ip = Function code */ - cmp ip, #0 /* < 0: System call */ - bge l_hooksvc /* >= 0: Extended SVC */ - - mov ip, ip, lsr #8 - and ip, ip, #0xff /* Number of arguments */ - - cmp ip, #5 - itt ge - ldrge r10, [r4] - stmfdge sp!, {r10} /* Fifth argument */ - cmp ip, #4 - it ge - stmfdge sp!, {r3} /* Fourth argument */ - cmp ip, #3 - it ge - stmfdge sp!, {r2} /* Third argument */ - mov r3, r1 /* Second argument */ -l_hooksvc: - mov r2, r0 /* First argument */ - mov r1, r9 /* calinf */ - ldr r0, [r5] /* fncd */ - ldr ip, =Csym(knl_hook_enterfn) - ldr ip, [ip] - blx ip /* exinf = enter(fncd, ...) */ - mov ip, r0 /* Temporarily save 'exinf' */ - - mov sp, r8 /* Return stack position */ - ldmfd sp!, {r0-r3, r8-r10} /* Restore argument and register for work */ - stmfd sp!, {ip} /* Save 'exinf' to stack */ - b ret_hook_enter - - .thumb_func -hook_leave: - mov r1, r0 /* r1 = ret */ - - mov lr, #0 - ldr r0, [r5] /* r0 = Function code */ - cmp r0, #0 /* < 0: System call */ - bge l_hooksvc2 /* >= 0: Extended SVC */ - - mov lr, r0, lsr #8 - and lr, lr, #0xff /* Number of arguments */ - subs lr, lr, #4 - it lt - movlt lr, #0 -l_hooksvc2: - - add lr, lr, #1 /* Whether 'hook_enter' is executed */ - sub ip, sp, r5 /* Check by stack usage */ - sub r7, r5, #10*4 /* Location in which 'sp = exinf' is saved */ - cmp lr, ip, lsr #2 /* If 'hook_enter' is executed, */ - ite eq - ldreq r2, =0 /* Get 'exinf' from stack */ - ldrne r2, [r7] /* If 'exinf' is not saved, 0 */ - - str r9, [r7] /* r9 save */ - mov r9, r1 /* Save 'ret' in 'r9' */ - - ldr ip, =Csym(knl_hook_leavefn) - ldr ip, [ip] - blx ip /* call leave(fncd, ret, exinf) */ - - mov r0, r9 /* r0 = ret restore */ - ldr r9, [r7] /* r9 restore */ - b ret_hook_leave - -/* - * Set/Free system call/extended SVC hook routine -*/ - .text - .align 2 - - .thumb - .thumb_func - .globl Csym(knl_hook_svc) -Csym(knl_hook_svc): - ldr r0, =hook_enter_jmp - ldr r1, =hook_leave_jmp - ldr r2, =hook_enter - ldr r3, =hook_leave - str r2, [r0] - str r3, [r1] - bx lr - - .thumb - .thumb_func - .globl Csym(knl_unhook_svc) -Csym(knl_unhook_svc): - ldr r0, =hook_enter_jmp - ldr r1, =hook_leave_jmp - ldr r2, =ret_hook_enter - ldr r3, =ret_hook_leave - str r2, [r0] - str r3, [r1] - bx lr - - .data -hook_enter_jmp: .long ret_hook_enter -hook_leave_jmp: .long ret_hook_leave - -#endif /* USE_DBGSPT & USE_HOOK_TRACE */ -#endif /* USE_TRAP | USE_DBGSPT | CFN_MAX_SSYID > 0 */ - -/* ------------------------------------------------------------------------ */ - -#if USE_DBGSPT & (USE_TRAP | USE_HOOK_TRACE) -/* - * Debugger support function service call entry table - */ - - .text - .align 2 - .thumb -_tdsvctbl: - .int Csym(knl_no_support) -#include - -/* - * Debugger support function service call entry - */ - .text - .align 2 - .thumb - .thumb_func - .globl Csym(knl_call_dbgspt) -Csym(knl_call_dbgspt): - - stmfd sp!, {r4-r6, lr} /* Save register for work */ - - mov r4, ip /* r4 -> func code */ - mov r5, r4, asr #16 /* r5 = Function number */ - ldr r6, =N_TDFN + 0xffff8000 - cmp r5, r6 - bgt b_illegal_svc - - ldr ip, =_tdsvctbl - (0xffff8000 << 2) - add r4, ip, r5, lsl #2 - ldr r4, [r4] /* r4 = system call address */ - blx r4 - -b_retsvc: - ldmfd sp!, {r4-r6, lr} /* Restore register for work */ - EXC_RETURN - - -b_illegal_svc: - ldr r0, =E_RSFN - b b_retsvc - -#endif /* USE_DBGSPT & (USE_TRAP | USE_HOOK_TRACE) */ - - -/* ------------------------------------------------------------------------ */ -/* * High level programming language routine for timer handler */ .text @@ -759,21 +228,19 @@ b_illegal_svc: .globl Csym(knl_timer_handler_startup) Csym(knl_timer_handler_startup): - stmfd sp!, {r4-r5, ip, lr} /* Register save */ + push {r3-r5, lr} /* Register save */ ldr r4, =Csym(knl_taskindp) /* Enter task independent part */ ldr r5, [r4] - add r0, r5, #1 + adds r0, r5, #1 str r0, [r4] bl Csym(knl_timer_handler) /* call timer_handler() */ str r5, [r4] /* Leave task independent part */ - ldmfd sp!, {r4-r5, ip, lr} /* Register restore */ + pop {r3-r5, pc} /* Register restore */ - bx lr - /* ------------------------------------------------------------------------ */ /* @@ -786,12 +253,12 @@ Csym(knl_timer_handler_startup): .thumb_func .globl Csym(knl_force_dispatch) Csym(knl_force_dispatch): - ldr r0, =INTNO_FORCE_DISPATCH - ldr r1, =SCB_STIR + ldr r0, =(1 << (INTNO_FORCE_DISPATCH % 32)) + ldr r1, =NVIC_ISPR(INTNO_FORCE_DISPATCH) str r0, [r1] dsb - mov r0, #0 + movs r0, #0 bl Csym(enaint) bx lr @@ -799,8 +266,8 @@ Csym(knl_force_dispatch): .thumb_func .globl Csym(knl_dispatch) Csym(knl_dispatch): - ldr r0, =0xE000ED04 /* ICSR */ - ldr r1, =0x10000000 /* PENDSVSET */ + ldr r0, =SCB_ICSR + ldr r1, =ICSR_PENDSVSET str r1, [r0] bx lr @@ -819,33 +286,9 @@ Csym(knl_dispatch): .thumb_func .globl Csym(knl_clear_hw_timer_interrupt) Csym(knl_clear_hw_timer_interrupt): - ldr r0, =0xE000ED04 /* ICSR */ - ldr r1, =0x02000000 /* PENDSTCLR */ + ldr r0, =SCB_ICSR + ldr r1, =ICSR_PENDSTCLR str r1, [r0] bx lr - -/* - * Control register operation - */ - .thumb - .thumb_func - .globl Csym(knl_getXPSR) -Csym(knl_getXPSR): - mrs r0, xpsr - bx lr - - .thumb - .thumb_func - .globl Csym(knl_getBASEPRI) -Csym(knl_getBASEPRI): - mrs r0, basepri - bx lr - - .thumb - .thumb_func - .globl Csym(knl_getPRIMASK) -Csym(knl_getPRIMASK): - mrs r0, primask - bx lr .end diff -uNpr utkernel_source.orig/kernel/sysdepend/device/app_mb9af312k/icrt0.S utkernel_source/kernel/sysdepend/device/app_mb9af312k/icrt0.S --- utkernel_source.orig/kernel/sysdepend/device/app_mb9af312k/icrt0.S Fri May 10 10:32:00 2013 +++ utkernel_source/kernel/sysdepend/device/app_mb9af312k/icrt0.S Sun Sep 22 18:47:40 2013 @@ -62,8 +62,9 @@ bss_done: #if USE_IMALLOC ldr r5, =SYSTEMAREA_TOP cmp r2, r5 /* _end or RAM_TOP */ - it hi - movhi r5, r2 /* Either of High addresses */ + bls 0f + mov r5, r2 /* Either of High addresses */ +0: ldr r0, =Csym(knl_lowmem_top) str r5, [r0] /* knl_lowmem_top = _end or RAM_TOP */ ldr r5, =SYSTEMAREA_END - (EXC_STACK_SIZE + TMP_STACK_SIZE) @@ -76,36 +77,28 @@ bss_done: #endif /* Configure exception priorities */ - ldr r5, =SCB_AIRCR /* Application interrupt and reset control register */ - ldr r6, [r5] - ldr r7, =0xFFFFF8FF - ands r6, r6, r7 - orrs r6, r6, #0x0300 /* PRIGRP:SUBPRI = 4 : 4 */ - str r6, [r5] - ldr r5, =SCB_SHPR2 movs r6, #0 /* SVC pri = 0 */ str r6, [r5] ldr r5, =SCB_SHPR3 - ldr r6, =0x10F00000 /* Pendsv pri = 0xF, sistick pri = 0x1 */ + ldr r6, =0x40C00000 /* Pendsv pri = 3, sistick pri = 1 */ str r6, [r5] ldr r5, =NVIC_IPR_FORCE_DISPATCH ldr r6, [r5] - movt r6, #0xc030 /* force dispatch pri = 0xC, IRQ #94 pri = 0x3 */ + ldr r6, =(0xC0 << (8 * (NVIC_IPR_FORCE_DISPATCH % 4))) + /* force dispatch pri = 3 */ str r6, [r5] /* Enable software interrupt */ ldr r0, =INTNO_FORCE_DISPATCH bl Csym(EnableInt) - ldr r0, =INTNO_IRQ - bl Csym(EnableInt) - ldr r5, =SCB_CCR ldr r6, [r5] - orrs r6, r6, #0x02 + movs r7, #0x02 + orrs r6, r6, r7 str r6, [r5] kernel_start: diff -uNpr utkernel_source.orig/kernel/sysdepend/device/app_mb9af312k/power.c utkernel_source/kernel/sysdepend/device/app_mb9af312k/power.c --- utkernel_source.orig/kernel/sysdepend/device/app_mb9af312k/power.c Fri May 10 10:32:00 2013 +++ utkernel_source/kernel/sysdepend/device/app_mb9af312k/power.c Wed Sep 18 04:45:10 2013 @@ -25,6 +25,7 @@ #include "sysmgr.h" +#if 0 // none calls these functions /* * Switch to power-saving mode */ @@ -38,3 +39,4 @@ EXPORT void knl_low_pow( void ) EXPORT void knl_off_pow( void ) { } +#endif diff -uNpr utkernel_source.orig/kernel/sysdepend/device/app_mb9af312k/startup_ram.S utkernel_source/kernel/sysdepend/device/app_mb9af312k/startup_ram.S --- utkernel_source.orig/kernel/sysdepend/device/app_mb9af312k/startup_ram.S Fri May 10 10:32:01 2013 +++ utkernel_source/kernel/sysdepend/device/app_mb9af312k/startup_ram.S Wed Sep 18 04:45:10 2013 @@ -31,6 +31,8 @@ #include #include +#define SCB_VTOR 0xE000ED08 + .code 16 .syntax unified .thumb diff -uNpr utkernel_source.orig/kernel/sysdepend/device/app_mb9af312k/startup_rom.S utkernel_source/kernel/sysdepend/device/app_mb9af312k/startup_rom.S --- utkernel_source.orig/kernel/sysdepend/device/app_mb9af312k/startup_rom.S Fri May 10 10:32:01 2013 +++ utkernel_source/kernel/sysdepend/device/app_mb9af312k/startup_rom.S Sun Sep 22 04:43:34 2013 @@ -35,14 +35,6 @@ .syntax unified .thumb - .section .data_vector,"aw" - .align 2 -vector_syshdr: - .space (16 * 4), 0 - .globl Csym(knl_intvec) -Csym(knl_intvec): - .space (48 * 4), 0 - /* * ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; * ; @@ -59,25 +51,6 @@ Csym(knl_intvec): .type Csym(Reset_Handler), %function Csym(Reset_Handler): bl Csym(init_clock_control) - -setup_ram_vectors: - /* Load vector table to SRAM*/ - ldr r1, =__vector_org /* src address */ - ldr r2, =__vector_start /* dst address */ - ldr r3, =__vector_end - sub r3, r3, r2 /* r3 := r3 - r2 = vector_size */ - -vector_loop: - ldmia r1!, {r0} - stmia r2!, {r0} - subs r3, r3, #4 - bne vector_loop /* if vector_size != 0 */ - -vector_done: - /* Set vector table offset to SRAM */ - ldr r1, =SCB_VTOR - ldr r2, =__vector_start - str r2, [r1] data_init: /* .data */ ldr r1, =__data_org /* src address */ diff -uNpr utkernel_source.orig/kernel/sysdepend/device/app_mb9af312k/tkdev_conf.h utkernel_source/kernel/sysdepend/device/app_mb9af312k/tkdev_conf.h --- utkernel_source.orig/kernel/sysdepend/device/app_mb9af312k/tkdev_conf.h Fri May 10 10:32:01 2013 +++ utkernel_source/kernel/sysdepend/device/app_mb9af312k/tkdev_conf.h Sat Sep 21 06:13:40 2013 @@ -34,7 +34,7 @@ // swkim_timer -#define TMCLK 40 //120 /* Timer clock input (MHz) */ +#define TMCLK (CPU_CLOCK / 1000000) // MHz /* * Timer interrupt level diff -uNpr utkernel_source.orig/kernel/sysdepend/device/app_mb9af312k/tkdev_timer.h utkernel_source/kernel/sysdepend/device/app_mb9af312k/tkdev_timer.h --- utkernel_source.orig/kernel/sysdepend/device/app_mb9af312k/tkdev_timer.h Fri May 10 10:32:02 2013 +++ utkernel_source/kernel/sysdepend/device/app_mb9af312k/tkdev_timer.h Wed Sep 18 04:45:10 2013 @@ -30,12 +30,6 @@ #include #include "tkdev_conf.h" -#define ENAINT Asm("ldr r0, =0 \n" \ - "msr basepri, r0") - -#define DISINT Asm("ldr r0, =MAX_EXTINT_PRI \n" \ - "msr basepri, r0") - /* * Settable interval range (millisecond) */ diff -uNpr utkernel_source.orig/kernel/sysdepend/device/app_mb9af312k/vector.S utkernel_source/kernel/sysdepend/device/app_mb9af312k/vector.S --- utkernel_source.orig/kernel/sysdepend/device/app_mb9af312k/vector.S Fri May 10 10:32:02 2013 +++ utkernel_source/kernel/sysdepend/device/app_mb9af312k/vector.S Sun Sep 22 04:57:00 2013 @@ -46,72 +46,53 @@ __vector: .word Csym(Reset_Handler) /* 1 -> reset */ .word Csym(nmi_handler) /* 2 -> Non maskable interrupt */ .word Csym(hardfault_handler) /* 3 -> Hard fault */ - .word Csym(memmng_handler) /* 4 -> Memory manage fault */ - .word Csym(busfault_handler) /* 5 -> Bus fault abort */ - .word Csym(usagefault_handler) /* 6 -> Usage fault */ + .word 0 /* 4 -> Reserved */ + .word 0 /* 5 -> Reserved */ + .word 0 /* 6 -> Reserved */ .word 0 /* 7 -> Reserved */ .word 0 /* 8 -> Reserved */ .word 0 /* 9 -> Reserved */ .word 0 /* 10 -> Reserved */ - .word Csym(knl_svcall_entry) /* 11 -> Svcall */ - .word 0 /* 12 -> Debug monitor */ + .word 0 /* 11 -> Svcall */ + .word 0 /* 12 -> Reserved */ .word 0 /* 13 -> Reserved */ .word Csym(knl_dispatch_entry) /* 14 -> Pend SV */ .word Csym(knl_timer_handler_startup) /* 15 -> Systick */ /* External Interrupts */ __extintvec: - .word Csym(CSV_Handler) /* 0: Clock Super Visor */ - .word Csym(SWDT_Handler) /* 1: Software Watchdog Timer */ - .word Csym(LVD_Handler) /* 2: Low Voltage Detector */ - .word Csym(MFT_WG_IRQHandler) /* 3: Wave Form Generator / DTIF */ - .word Csym(INT0_7_Handler) /* 4: External Interrupt Request ch.0 to ch.7 */ - .word Csym(INT8_15_Handler) /* 5: External Interrupt Request ch.8 to ch.15 */ - .word Csym(DT_Handler) /* 6: Dual Timer / Quad Decoder */ - .word Csym(MFS0RX_IRQHandler) /* 7: MultiFunction Serial ch.0 */ - .word Csym(MFS0TX_IRQHandler) /* 8: MultiFunction Serial ch.0 */ - .word Csym(MFS1RX_IRQHandler) /* 9: MultiFunction Serial ch.1 */ - .word Csym(MFS1TX_IRQHandler) /* 10: MultiFunction Serial ch.1 */ - .word Csym(MFS2RX_IRQHandler) /* 11: MultiFunction Serial ch.2 */ - .word Csym(MFS2TX_IRQHandler) /* 12: MultiFunction Serial ch.2 */ - .word Csym(MFS3RX_IRQHandler) /* 13: MultiFunction Serial ch.3 */ - .word Csym(MFS3TX_IRQHandler) /* 14: MultiFunction Serial ch.3 */ - .word Csym(MFS4RX_IRQHandler) /* 15: MultiFunction Serial ch.4 */ - .word Csym(MFS4TX_IRQHandler) /* 16: MultiFunction Serial ch.4 */ - .word Csym(MFS5RX_IRQHandler) /* 17: MultiFunction Serial ch.5 */ - .word Csym(MFS5TX_IRQHandler) /* 18: MultiFunction Serial ch.5 */ - .word Csym(MFS6RX_IRQHandler) /* 19: MultiFunction Serial ch.6 */ - .word Csym(MFS6TX_IRQHandler) /* 20: MultiFunction Serial ch.6 */ - .word Csym(MFS7RX_IRQHandler) /* 21: MultiFunction Serial ch.7 */ - .word Csym(MFS7TX_IRQHandler) /* 22: MultiFunction Serial ch.7 */ - .word Csym(PPG_Handler) /* 23: PPG */ - .word Csym(TIM_IRQHandler) /* 24: OSC / PLL / Watch Counter */ - .word Csym(ADC0_IRQHandler) /* 25: ADC0 */ - .word Csym(ADC1_IRQHandler) /* 26: ADC1 */ - .word Csym(ADC2_IRQHandler) /* 27: ADC2 */ - .word Csym(MFT_FRT_IRQHandler) /* 28: Free-run Timer */ - .word Csym(MFT_IPC_IRQHandler) /* 29: Input Capture */ - .word Csym(MFT_OPC_IRQHandler) /* 30: Output Compare */ - .word Csym(BT_IRQHandler) /* 31: Base Timer ch.0 to ch.7 */ - .word Csym(CAN0_IRQHandler) /* 32: CAN ch.0 */ - .word Csym(CAN1_IRQHandler) /* 33: CAN ch.1 */ - .word Csym(USBF_Handler) /* 34: USB Function */ - .word Csym(USB_Handler) /* 35: USB Function / USB HOST */ - .word Csym(DummyHandler) /* 36: Reserved */ - .word Csym(DummyHandler) /* 37: Reserved */ - .word Csym(DMAC0_Handler) /* 38: DMAC ch.0 */ - .word Csym(DMAC1_Handler) /* 39: DMAC ch.1 */ - .word Csym(DMAC2_Handler) /* 40: DMAC ch.2 */ - .word Csym(DMAC3_Handler) /* 41: DMAC ch.3 */ - .word Csym(DMAC4_Handler) /* 42: DMAC ch.4 */ - .word Csym(DMAC5_Handler) /* 43: DMAC ch.5 */ - .word Csym(DMAC6_Handler) /* 44: DMAC ch.6 */ - .word Csym(DMAC7_Handler) /* 45: DMAC ch.7 */ - .word Csym(knl_call_entry) /* 46: Software Interrupt */ - .word Csym(knl_dispatch_to_schedtsk) /* 47: force dispatch */ + .word Csym(knl_inthdr_startup) /* 0 */ + .word Csym(knl_inthdr_startup) /* 1 */ + .word Csym(knl_inthdr_startup) /* 2 */ + .word Csym(knl_inthdr_startup) /* 3 */ + .word Csym(knl_inthdr_startup) /* 4 */ + .word Csym(knl_inthdr_startup) /* 5 */ + .word Csym(knl_inthdr_startup) /* 6 */ + .word Csym(knl_inthdr_startup) /* 7 */ + .word Csym(knl_inthdr_startup) /* 8 */ + .word Csym(knl_inthdr_startup) /* 9 */ + .word Csym(knl_inthdr_startup) /* 10 */ + .word Csym(knl_inthdr_startup) /* 11 */ + .word Csym(knl_inthdr_startup) /* 12 */ + .word Csym(knl_inthdr_startup) /* 13 */ + .word Csym(knl_inthdr_startup) /* 14 */ + .word Csym(knl_inthdr_startup) /* 15 */ + .word Csym(knl_inthdr_startup) /* 16 */ + .word Csym(knl_inthdr_startup) /* 17 */ + .word Csym(knl_inthdr_startup) /* 18 */ + .word Csym(knl_inthdr_startup) /* 19 */ + .word Csym(knl_inthdr_startup) /* 20 */ + .word Csym(knl_inthdr_startup) /* 21 */ + .word Csym(knl_inthdr_startup) /* 22 */ + .word Csym(knl_inthdr_startup) /* 23 */ + .word Csym(knl_inthdr_startup) /* 24 */ + .word Csym(knl_inthdr_startup) /* 25 */ + .word Csym(knl_inthdr_startup) /* 26 */ + .word Csym(knl_dispatch_to_schedtsk) /* 27 */ + .word Csym(knl_inthdr_startup) /* 28 */ + .word Csym(knl_inthdr_startup) /* 29 */ + .word Csym(knl_inthdr_startup) /* 30 */ + .word Csym(knl_inthdr_startup) /* 31 */ - .weak Csym(knl_intvec) - .set Csym(knl_intvec), __extintvec - /* * ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; * ;; @@ -121,103 +102,6 @@ __extintvec: .text .align 2 - .thumb - .thumb_func - .globl Csym(Default_Handler) -Csym(Default_Handler): - b . - - .weak Csym(CSV_Handler) - .thumb_set Csym(CSV_Handler), Csym(Default_Handler) - .weak Csym(SWDT_Handler) - .thumb_set Csym(SWDT_Handler), Csym(Default_Handler) - .weak Csym(LVD_Handler) - .thumb_set Csym(LVD_Handler), Csym(Default_Handler) - .weak Csym(MFT_WG_IRQHandler) - .thumb_set Csym(MFT_WG_IRQHandler), Csym(Default_Handler) - .weak Csym(INT0_7_Handler) - .thumb_set Csym(INT0_7_Handler), Csym(Default_Handler) - .weak Csym(INT8_15_Handler) - .thumb_set Csym(INT8_15_Handler), Csym(Default_Handler) - .weak Csym(DT_Handler) - .thumb_set Csym(DT_Handler), Csym(Default_Handler) - .weak Csym(MFS0RX_IRQHandler) - .thumb_set Csym(MFS0RX_IRQHandler), Csym(Default_Handler) - .weak Csym(MFS0TX_IRQHandler) - .thumb_set Csym(MFS0TX_IRQHandler), Csym(Default_Handler) - .weak Csym(MFS1RX_IRQHandler) - .thumb_set Csym(MFS1RX_IRQHandler), Csym(Default_Handler) - .weak Csym(MFS1TX_IRQHandler) - .thumb_set Csym(MFS1TX_IRQHandler), Csym(Default_Handler) - .weak Csym(MFS2RX_IRQHandler) - .thumb_set Csym(MFS2RX_IRQHandler), Csym(Default_Handler) - .weak Csym(MFS2TX_IRQHandler) - .thumb_set Csym(MFS2TX_IRQHandler), Csym(Default_Handler) - .weak Csym(MFS3RX_IRQHandler) - .thumb_set Csym(MFS3RX_IRQHandler), Csym(Default_Handler) - .weak Csym(MFS3TX_IRQHandler) - .thumb_set Csym(MFS3TX_IRQHandler), Csym(Default_Handler) - .weak Csym(MFS4RX_IRQHandler) - .thumb_set Csym(MFS4RX_IRQHandler), Csym(Default_Handler) - .weak Csym(MFS4TX_IRQHandler) - .thumb_set Csym(MFS4TX_IRQHandler), Csym(Default_Handler) - .weak Csym(MFS5RX_IRQHandler) - .thumb_set Csym(MFS5RX_IRQHandler), Csym(Default_Handler) - .weak Csym(MFS5TX_IRQHandler) - .thumb_set Csym(MFS5TX_IRQHandler), Csym(Default_Handler) - .weak Csym(MFS6RX_IRQHandler) - .thumb_set Csym(MFS6RX_IRQHandler), Csym(Default_Handler) - .weak Csym(MFS6TX_IRQHandler) - .thumb_set Csym(MFS6TX_IRQHandler), Csym(Default_Handler) - .weak Csym(MFS7RX_IRQHandler) - .thumb_set Csym(MFS7RX_IRQHandler), Csym(Default_Handler) - .weak Csym(MFS7TX_IRQHandler) - .thumb_set Csym(MFS7TX_IRQHandler), Csym(Default_Handler) - .weak Csym(PPG_Handler) - .thumb_set Csym(PPG_Handler), Csym(Default_Handler) - .weak Csym(TIM_IRQHandler) - .thumb_set Csym(TIM_IRQHandler), Csym(Default_Handler) - .weak Csym(ADC0_IRQHandler) - .thumb_set Csym(ADC0_IRQHandler), Csym(Default_Handler) - .weak Csym(ADC1_IRQHandler) - .thumb_set Csym(ADC1_IRQHandler), Csym(Default_Handler) - .weak Csym(ADC2_IRQHandler) - .thumb_set Csym(ADC2_IRQHandler), Csym(Default_Handler) - .weak Csym(MFT_FRT_IRQHandler) - .thumb_set Csym(MFT_FRT_IRQHandler), Csym(Default_Handler) - .weak Csym(MFT_IPC_IRQHandler) - .thumb_set Csym(MFT_IPC_IRQHandler), Csym(Default_Handler) - .weak Csym(MFT_OPC_IRQHandler) - .thumb_set Csym(MFT_OPC_IRQHandler), Csym(Default_Handler) - .weak Csym(BT_IRQHandler) - .thumb_set Csym(BT_IRQHandler), Csym(Default_Handler) - .weak Csym(CAN0_IRQHandler) - .thumb_set Csym(CAN0_IRQHandler), Csym(Default_Handler) - .weak Csym(CAN1_IRQHandler) - .thumb_set Csym(CAN1_IRQHandler), Csym(Default_Handler) - .weak Csym(USBF_Handler) - .thumb_set Csym(USBF_Handler), Csym(Default_Handler) - .weak Csym(USB_Handler) - .thumb_set Csym(USB_Handler), Csym(Default_Handler) - .weak Csym(DMAC0_Handler) - .thumb_set Csym(DMAC0_Handler), Csym(Default_Handler) - .weak Csym(DMAC1_Handler) - .thumb_set Csym(DMAC1_Handler), Csym(Default_Handler) - .weak Csym(DMAC2_Handler) - .thumb_set Csym(DMAC2_Handler), Csym(Default_Handler) - .weak Csym(DMAC3_Handler) - .thumb_set Csym(DMAC3_Handler), Csym(Default_Handler) - .weak Csym(DMAC4_Handler) - .thumb_set Csym(DMAC4_Handler), Csym(Default_Handler) - .weak Csym(DMAC5_Handler) - .thumb_set Csym(DMAC5_Handler), Csym(Default_Handler) - .weak Csym(DMAC6_Handler) - .thumb_set Csym(DMAC6_Handler), Csym(Default_Handler) - .weak Csym(DMAC7_Handler) - .thumb_set Csym(DMAC7_Handler), Csym(Default_Handler) - .weak Csym(DummyHandler) - .thumb_set Csym(DummyHandler), Csym(Default_Handler) - /* * NMI handler */ @@ -234,33 +118,6 @@ Csym(nmi_handler): .thumb_func .globl Csym(hardfault_handler) Csym(hardfault_handler): - b . - -/* - * memory fault handler. - */ - .thumb - .thumb_func - .globl Csym(memmng_handler) -Csym(memmng_handler): - b . - -/* - * Bus fault handler. - */ - .thumb - .thumb_func - .globl Csym(busfault_handler) -Csym(busfault_handler): - b . - -/* - * Usage fault handler. - */ - .thumb - .thumb_func - .globl Csym(nmusagefault_handleri_handler) -Csym(usagefault_handler): b . .end diff -uNpr utkernel_source.orig/kernel/sysmain/build/app_mb9af312k/kernel-rom.lnk utkernel_source/kernel/sysmain/build/app_mb9af312k/kernel-rom.lnk --- utkernel_source.orig/kernel/sysmain/build/app_mb9af312k/kernel-rom.lnk Fri May 10 10:39:13 2013 +++ utkernel_source/kernel/sysmain/build/app_mb9af312k/kernel-rom.lnk Sat Sep 21 17:31:59 2013 @@ -32,6 +32,7 @@ SECTIONS { .text 0x00000000 : { __vector_org = .; *(.vector) + . = 0x00000200; __start = .; *(.text) *(.text.*) @@ -41,12 +42,7 @@ SECTIONS { } =0 . = ALIGN(4); __data_org = .; - vector 0x1fffe000 (NOLOAD) : { - __vector_start = .; - *(.data_vector) - __vector_end = .; - } - .data : AT(__data_org) { + .data 0x10000000 : AT(__data_org) { __data_start = .; *(.data) . = ALIGN(4); diff -uNpr utkernel_source.orig/lib/libsvc/build/mb9af312k/makeifex.pl utkernel_source/lib/libsvc/build/mb9af312k/makeifex.pl --- utkernel_source.orig/lib/libsvc/build/mb9af312k/makeifex.pl Fri May 10 10:32:27 2013 +++ utkernel_source/lib/libsvc/build/mb9af312k/makeifex.pl Wed Sep 18 04:45:10 2013 @@ -1,4 +1,4 @@ -#! /usr/local/bin/perl +#! /usr/bin/env perl # # ---------------------------------------------------------------------- # micro T-Kernel diff -uNpr utkernel_source.orig/lib/libsvc/build/mb9af312k/makeiftd.pl utkernel_source/lib/libsvc/build/mb9af312k/makeiftd.pl --- utkernel_source.orig/lib/libsvc/build/mb9af312k/makeiftd.pl Fri May 10 10:32:27 2013 +++ utkernel_source/lib/libsvc/build/mb9af312k/makeiftd.pl Wed Sep 18 04:45:10 2013 @@ -1,4 +1,4 @@ -#! /usr/local/bin/perl +#! /usr/bin/env perl # # ---------------------------------------------------------------------- # micro T-Kernel diff -uNpr utkernel_source.orig/lib/libsvc/build/mb9af312k/makeiftk.pl utkernel_source/lib/libsvc/build/mb9af312k/makeiftk.pl --- utkernel_source.orig/lib/libsvc/build/mb9af312k/makeiftk.pl Fri May 10 10:32:27 2013 +++ utkernel_source/lib/libsvc/build/mb9af312k/makeiftk.pl Wed Sep 18 04:45:10 2013 @@ -1,4 +1,4 @@ -#! /usr/local/bin/perl +#! /usr/bin/env perl # # ---------------------------------------------------------------------- # micro T-Kernel diff -uNpr utkernel_source.orig/lib/libsvc/src/sysdepend/mb9af312k/callsvc.S utkernel_source/lib/libsvc/src/sysdepend/mb9af312k/callsvc.S --- utkernel_source.orig/lib/libsvc/src/sysdepend/mb9af312k/callsvc.S Fri May 10 10:33:40 2013 +++ utkernel_source/lib/libsvc/src/sysdepend/mb9af312k/callsvc.S Wed Sep 18 04:45:10 2013 @@ -22,10 +22,9 @@ .globl Csym(callsvc) .type Csym(callsvc), %function Csym(callsvc): - stmfd sp!, {r1-r3} + push {r1-r3,lr} mov ip, r0 mov r0, sp - stmfd sp!, {lr} #if USE_TRAP svc SVC_EXTENDED_SVC @@ -33,7 +32,6 @@ Csym(callsvc): bl knl_call_entry #endif - ldmfd sp!, {lr} add sp, sp, #3*4 - bx lr + pop {pc} diff -uNpr utkernel_source.orig/lib/libtk/src/sysdepend/app_mb9af312k/disint.S utkernel_source/lib/libtk/src/sysdepend/app_mb9af312k/disint.S --- utkernel_source.orig/lib/libtk/src/sysdepend/app_mb9af312k/disint.S Fri May 10 10:34:18 2013 +++ utkernel_source/lib/libtk/src/sysdepend/app_mb9af312k/disint.S Wed Sep 18 04:45:10 2013 @@ -41,9 +41,8 @@ .globl Csym(disint) .type Csym(disint), %function Csym(disint): - mrs r0, basepri - ldr r1, =MAX_EXTINT_PRI - msr basepri, r1 + mrs r0, primask + cpsid i bx lr @@ -58,7 +57,7 @@ Csym(disint): .globl Csym(enaint) .type Csym(enaint), %function Csym(enaint): - msr basepri, r0 + msr primask, r0 bx lr .end diff -uNpr utkernel_source.orig/lib/libtm/src/sysdepend/app_mb9af312k/sio.c utkernel_source/lib/libtm/src/sysdepend/app_mb9af312k/sio.c --- utkernel_source.orig/lib/libtm/src/sysdepend/app_mb9af312k/sio.c Fri May 10 10:34:20 2013 +++ utkernel_source/lib/libtm/src/sysdepend/app_mb9af312k/sio.c Mon Sep 23 03:01:20 2013 @@ -1,182 +1,82 @@ -/* - *---------------------------------------------------------------------- - * UCT micro T-Kernel DevKit tuned for FM3. - * - * Copyright (c) 2011-2013 UC Technology. All Rights Reserved. - *---------------------------------------------------------------------- - * - * Version: 1.00.00 - * Released by UC Technology (http://www.uctec.com/) at 2013/05/13. - * - *---------------------------------------------------------------------- - */ +// original code by Takayoshi SASANO +// this code is licensed under NYSL 0.9982, http://www.kmonos.net/nysl/NYSL.TXT -#include +#include -#define TERM_PORT 0 +#define uartBase 0x40008000 // UART0 +#define uartStep 0x04 +#define uartClock (CPU_CLOCK / 1) // Hz +#define uartSpeed 38400 // bps +#define uartDivisor (uartClock / (uartSpeed * 16)) +Inline UW uartRead(UW adr) {return *(_UW*)adr;} +Inline void uartWrite(UW adr, UW dat) {*(_UW*)adr = dat;} -#define CPU_CLOCK (20000000UL) -#define BAUD_RATE (115200UL) +#define RHR (uartBase + (0x00 * uartStep)) // r +#define THR (uartBase + (0x00 * uartStep)) // w +#define IER (uartBase + (0x01 * uartStep)) // rw +#define ISR (uartBase + (0x02 * uartStep)) // r +#define FCR (uartBase + (0x02 * uartStep)) // w +#define LCR (uartBase + (0x03 * uartStep)) // rw +#define MCR (uartBase + (0x04 * uartStep)) // rw +#define LSR (uartBase + (0x05 * uartStep)) // r -#define GPIO_BASE (0x40033000UL) -#define GPIO_PFR1 ((_UW*)(GPIO_BASE + 0x0004UL)) -#define GPIO_PFR2 ((_UW*)(GPIO_BASE + 0x0008UL)) -#define GPIO_PFR3 ((_UW*)(GPIO_BASE + 0x000cUL)) -#define GPIO_PFR4 ((_UW*)(GPIO_BASE + 0x0010UL)) -#define GPIO_EPFR07 ((_UW*)(GPIO_BASE + 0x061cUL)) -#define GPIO_EPFR08 ((_UW*)(GPIO_BASE + 0x0620UL)) -#define GPIO_ADE ((_UW*)(GPIO_BASE + 0x0500UL)) +#define DLL (uartBase + (0x00 * uartStep)) // rw +#define DLM (uartBase + (0x01 * uartStep)) // rw -#if TERM_PORT == 0 /* Sxx0_0 */ -#define UART_BASE (0x40038000UL) -#elif TERM_PORT == 1 /* Sxx1_1 */ -#define UART_BASE (0x40038100UL) -#elif TERM_PORT == 2 /* Sxx2_2 */ -#define UART_BASE (0x40038200UL) -#elif TERM_PORT == 3 /* Sxx3_2 */ -#define UART_BASE (0x40038300UL) -#elif TERM_PORT == 4 /* Sxx4_1 */ -#define UART_BASE (0x40038400UL) -#elif TERM_PORT == 5 /* Sxx5_2 */ -#define UART_BASE (0x40038500UL) -#elif TERM_PORT == 6 /* Sxx6_1 */ -#define UART_BASE (0x40038600UL) -#elif TERM_PORT == 7 /* Sxx7_1 */ -#define UART_BASE (0x40038700UL) -#elif TERM_PORT == 10 /* Sxx0_1 */ -#define UART_BASE (0x40038000UL) -#else /* default Sxx0_0 */ -#define UART_BASE (0x40038000UL) -#endif /* TERM_PORT */ -#define UART_SMR ((_UB*)(UART_BASE + 0x00UL)) -#define UART_SCR ((_UB*)(UART_BASE + 0x01UL)) -#define UART_ESCR ((_UB*)(UART_BASE + 0x04UL)) -#define UART_SSR ((_UB*)(UART_BASE + 0x05UL)) -#define UART_DR ((_UB*)(UART_BASE + 0x08UL)) -#define UART_BGR ((_UH*)(UART_BASE + 0x0cUL)) +/* LPC111X specific: pin selection, power control */ +#define IOCON_PIO1_6 ((_UW *)0x400440a4) +#define IOCON_PIO1_7 ((_UW *)0x400440a8) +#define AHBCLKCTRL ((_UW *)0x40048080) +#define UARTCLKDIV ((_UW *)0x40048098) -LOCAL void sendLine( const UB *buf ) -{ - while( *buf++ != '\0' ){ - while( (*UART_SSR & 0x02U) == 0 ); - *UART_DR = *buf; - } -} -LOCAL void sendChar( const UB *buf ) +int sio_send_frame(const unsigned char *buf, int size) { - while( (*UART_SSR & 0x02U) == 0 ); - *UART_DR = *buf; -} + int i; -LOCAL UB getChar( UB *buf ) -{ - while( (*UART_SSR & 0x04U) == 0 ); - *buf = *UART_DR; + for (i = 0; i < size; i++) { + while(!(uartRead(LSR) & 0x20)); // wait for Tx ready + uartWrite(THR, *buf++); + } - return *buf; + return i; } -EXPORT void sio_send_frame( const UB* buf, INT size ) +int sio_recv_frame(unsigned char* buf, int size) { - if(size == 1) { /* for tm_putchar */ - sendChar(buf); - } - else if (size >= 2) { /* for tm_putstring */ - sendLine(buf); - } - else { - } -} + int i, s, c; - -EXPORT void sio_recv_frame( UB* buf, INT size ) -{ - if(size == 1) { /* for tm_getchar */ - getChar( buf ); + for (i = 0; i < size; i++) { + while (1) { + s = uartRead(LSR); // get status + if (s & 0x1f) { // Rx ready + c = uartRead(RHR); // read from FIFO + if (!(s & 0x1e)) { // no error + *buf++ = c; + break; + } + } + } } - else { - } + + return i; } - -EXPORT void sio_init(void) +void sio_init(void) { - UW r; + *IOCON_PIO1_6 = 0xc1; // enable RXD pin + *IOCON_PIO1_7 = 0xc1; // enable TXD pin + *UARTCLKDIV = 0x01; // UART_PCLK = system clock / 1 + *AHBCLKCTRL |= (1 << 12); // UART power-up -#if TERM_PORT == 0 - r = *GPIO_ADE; - r &= 0xffffff7f; - *GPIO_ADE = r; - r = *GPIO_PFR2; - r |= 0x00000006U; - *GPIO_PFR2 = r; /* use P21, P22, P23 for Serial I/O */ - r = *GPIO_EPFR07; - r |= 0x00000040U; - *GPIO_EPFR07 = r; /* use UART0_0 for IN/OUT/CLOCK */ + uartWrite(IER, 0x00); // disable interrupt + uartWrite(LCR, 0x80); // set divisor + uartWrite(DLM, 0xff); // (avoid divisor=0) + uartWrite(DLL, (uartDivisor >> 0) & 0xff); + uartWrite(DLM, (uartDivisor >> 8) & 0xff); + uartWrite(LCR, 0x03); // data 8bit, stop 1bit, non-parity + uartWrite(MCR, 0x03); // RTS#, DTR# assert + uartWrite(FCR, 0x07); // FIFO enable and reset -#elif TERM_PORT == 1 - r = *GPIO_ADE; - r &= 0xfffffff1; - *GPIO_ADE = r; - *GPIO_PFR1 = 0x0000000eU; /* use P11, P12, P13 for Serial I/O */ - *GPIO_EPFR07 = 0x0000a800U; /* use UART1_1 for IN/OUT/CLOCK */ - -#elif TERM_PORT == 2 - r = *GPIO_ADE; - r &= 0xfffffc7f; - *GPIO_ADE = r; - *GPIO_PFR1 = 0x00000380U; /* use P17, P18, P19 for Serial I/O */ - *GPIO_EPFR07 = 0x003f0000U; /* use UART2_2 for IN/OUT/CLOCK */ - -#elif TERM_PORT == 3 - /* There are no bits for the UART3 in the GPIO_ADE register */ - *GPIO_PFR4 = 0x00000700U; /* use P48, P49, P4A for Serial I/O */ - *GPIO_EPFR07 = 0x0fc00000U; /* use UART3_2 for IN/OUT/CLOCK */ - -#elif TERM_PORT == 4 - r = *GPIO_ADE; - r &= 0xffffe3ff; - *GPIO_ADE = r; - *GPIO_PFR1 = 0x00001c00U; /* use P1A, P1B, P1C for Serial I/O */ - *GPIO_EPFR08 = 0x000002a0U; /* use UART4_1 for IN/OUT/CLOCK */ - -#elif TERM_PORT == 5 - /* There are no bits for the UART5 in the GPIO_ADE register */ - *GPIO_PFR3 = 0x000001c0U; /* use P36, P37, P38 for Serial I/O */ - *GPIO_EPFR08 = 0x0000fc00U; /* use UART5_2 for IN/OUT/CLOCK */ - -#elif TERM_PORT == 6 - /* There are no bits for the UART6 in the GPIO_ADE register */ - *GPIO_PFR3 = 0x0000000eU; /* use P33, P32, P31 for Serial I/O */ - *GPIO_EPFR08 = 0x002a0000U; /* use UART6_1 for IN/OUT/CLOCK */ - -#elif TERM_PORT == 7 - /* There are no bits for the UART7 in the GPIO_ADE register */ - *GPIO_PFR4 = 0x00007000U; /* use P4C, P4D, P4E for Serial I/O */ - *GPIO_EPFR08 = 0x0a800000U; /* use UART7_1 for IN/OUT/CLOCK */ - -#elif TERM_PORT == 10 - r = *GPIO_ADE; - r &= 0xffffff8f; - *GPIO_ADE = r; - *GPIO_PFR1 = 0x00000070U; /* use P14, P15, P16 for Serial I/O */ - *GPIO_EPFR07 = 0x000002a0U; /* use UART0_1 for IN/OUT/CLOCK */ - -#else - r = *GPIO_ADE; - r &= 0xfff8ffff; - *GPIO_ADE = r; - *GPIO_PFR2 = 0x0000000eU; /* use P21, P22, P23 for Serial I/O */ - *GPIO_EPFR07 = 0x00000040U; /* use UART0_0 for IN/OUT/CLOCK */ - -#endif /* TERM_PORT */ - - *UART_SCR = 0x80U; /* Clear */ - *UART_SMR = 0x01U; /* async normal mode, stop-bit = 1, LSB-first, output enable */ - - *UART_BGR = (((CPU_CLOCK)/ BAUD_RATE) - 1); /* baud rate */ - *UART_SCR = 0x80U; /* Clear */ - *UART_ESCR = 0x00U; /* no hardware flow control, non-parity, stop-bit = 1, data length = 8 bits */ - *UART_SCR = 0x03U; /* RX, TX enable */ + return; }