? arch/arm64/compile/GENERIC.MP/compile.sh
? arch/arm64/compile/GENERIC.MP/copy.sh
Index: arch/arm64/conf/GENERIC
===================================================================
RCS file: /cvs/src/sys/arch/arm64/conf/GENERIC,v
retrieving revision 1.213
diff -u -p -u -p -r1.213 GENERIC
--- arch/arm64/conf/GENERIC	9 Nov 2021 16:16:11 -0000	1.213
+++ arch/arm64/conf/GENERIC	14 Nov 2021 10:19:15 -0000
@@ -293,7 +293,7 @@ sdmmc*		at sximmc?	# SD/MMC bus
 sxisid*		at fdt? early 1
 sxisyscon*	at fdt? early 1	# System controller
 sxitemp*	at fdt?		# Temperature sensor
-sxitwi*		at fdt?		# I2C controller
+sxitwi*		at fdt?	early 1	# I2C controller
 iic*		at sxitwi?	# I2C bus
 dwxe*		at fdt?
 
@@ -479,6 +479,7 @@ uk*		at scsibus?
 
 # I2C devices
 abcrtc*		at iic?			# Abracon x80x RTC
+axppmic*	at iic?			# AXP80x PMIC
 cwfg*		at iic?			# CellWise CW201x fuel gauge
 dsxrtc*		at iic?			# DS3231 RTC
 escodec*	at iic?			# ES8316 audio codec
Index: dev/fdt/axppmic.c
===================================================================
RCS file: /cvs/src/sys/dev/fdt/axppmic.c,v
retrieving revision 1.11
diff -u -p -u -p -r1.11 axppmic.c
--- dev/fdt/axppmic.c	24 Oct 2021 17:52:26 -0000	1.11
+++ dev/fdt/axppmic.c	14 Nov 2021 10:19:16 -0000
@@ -293,6 +293,7 @@ struct axppmic_device axppmic_devices[] 
 	{ "x-powers,axp221", "AXP221", axp221_regdata, axp221_sensdata },
 	{ "x-powers,axp223", "AXP223", axp221_regdata, axp221_sensdata },
 	{ "x-powers,axp803", "AXP803", axp803_regdata, axp803_sensdata },
+	{ "x-powers,axp805", "AXP805", axp806_regdata },
 	{ "x-powers,axp806", "AXP806", axp806_regdata },
 	{ "x-powers,axp809", "AXP809", axp809_regdata, axp221_sensdata }
 };
@@ -491,8 +492,10 @@ axppmic_attach_common(struct axppmic_sof
 	sc->sc_sensdata = device->sensdata;
 
 	/* Switch AXP806 into master or slave mode. */
-	if (strcmp(name, "x-powers,axp806") == 0) {
-	    if (OF_getproplen(node, "x-powers,master-mode") == 0) {
+	if (strcmp(name, "x-powers,axp805") == 0 ||
+	    strcmp(name, "x-powers,axp806") == 0) {
+	    if (OF_getproplen(node, "x-powers,master-mode") == 0 ||
+	        OF_getproplen(node, "x-powers,self-working-mode") == 0) {
 			axppmic_write_reg(sc, AXP806_REG_ADDR_EXT,
 			    AXP806_REG_ADDR_EXT_MASTER_MODE);
 		} else {
Index: dev/fdt/com_fdt.c
===================================================================
RCS file: /cvs/src/sys/dev/fdt/com_fdt.c,v
retrieving revision 1.6
diff -u -p -u -p -r1.6 com_fdt.c
--- dev/fdt/com_fdt.c	24 Oct 2021 17:52:26 -0000	1.6
+++ dev/fdt/com_fdt.c	14 Nov 2021 10:19:16 -0000
@@ -33,8 +33,6 @@
 #include <dev/ofw/ofw_clock.h>
 #include <dev/ofw/ofw_pinctrl.h>
 
-#define com_usr 31	/* Synopsys DesignWare UART */
-
 int	com_fdt_match(struct device *, void *, void *);
 void	com_fdt_attach(struct device *, struct device *, void *);
 int	com_fdt_intr_designware(void *);
@@ -144,8 +142,10 @@ com_fdt_attach(struct device *parent, st
 	sc->sc_reg_shift = OF_getpropint(faa->fa_node, "reg-shift", shift);
 
 	if (OF_is_compatible(faa->fa_node, "snps,dw-apb-uart") ||
-	    OF_is_compatible(faa->fa_node, "marvell,armada-38x-uart"))
+	    OF_is_compatible(faa->fa_node, "marvell,armada-38x-uart")) {
+		sc->sc_uarttype = COM_UART_DW_APB;
 		intr = com_fdt_intr_designware;
+	}
 
 	if (OF_is_compatible(faa->fa_node, "ti,omap3-uart") ||
 	    OF_is_compatible(faa->fa_node, "ti,omap4-uart"))
Index: dev/fdt/sxiccmu_clocks.h
===================================================================
RCS file: /cvs/src/sys/dev/fdt/sxiccmu_clocks.h,v
retrieving revision 1.31
diff -u -p -u -p -r1.31 sxiccmu_clocks.h
--- dev/fdt/sxiccmu_clocks.h	29 Sep 2020 21:05:05 -0000	1.31
+++ dev/fdt/sxiccmu_clocks.h	14 Nov 2021 10:19:17 -0000
@@ -420,6 +420,7 @@ struct sxiccmu_ccu_bit sun8i_h3_r_gates[
 #define H6_CLK_BUS_UART1	71
 #define H6_CLK_BUS_UART2	72
 #define H6_CLK_BUS_UART3	73
+#define H6_CLK_BUS_EMAC		84
 #define H6_CLK_USB_OHCI0	104
 #define H6_CLK_USB_OHCI3	107
 #define H6_CLK_BUS_OHCI0	111
@@ -440,6 +441,7 @@ struct sxiccmu_ccu_bit sun50i_h6_gates[]
 	[H6_CLK_BUS_UART1] = { 0x090c, 1, H6_CLK_APB2 },
 	[H6_CLK_BUS_UART2] = { 0x090c, 2, H6_CLK_APB2 },
 	[H6_CLK_BUS_UART3] = { 0x090c, 3, H6_CLK_APB2 },
+	[H6_CLK_BUS_EMAC]  = { 0x097c, 0 },
 	[H6_CLK_USB_OHCI0] = { 0x0a70, 31 },
 	[H6_CLK_USB_OHCI3] = { 0x0a7c, 31 },
 	[H6_CLK_BUS_OHCI0] = { 0x0a8c, 0 },
@@ -451,10 +453,12 @@ struct sxiccmu_ccu_bit sun50i_h6_gates[]
 #define H6_R_CLK_APB1		2
 #define H6_R_CLK_APB2		3
 #define H6_R_CLK_APB2_I2C	8
+#define H6_R_CLK_APB2_RSB	13
 
 struct sxiccmu_ccu_bit sun50i_h6_r_gates[] = {
 	[H6_R_CLK_APB1] = { 0xffff, 0xff },
-	[H6_R_CLK_APB2_I2C] = { 0x019c, 1, H6_R_CLK_APB2 },
+	[H6_R_CLK_APB2_I2C] = { 0x019c, 0, H6_R_CLK_APB2 },
+	[H6_R_CLK_APB2_RSB] = { 0x01bc, 0, H6_R_CLK_APB2 },
 };
 
 /* R40 */
@@ -833,6 +837,7 @@ struct sxiccmu_ccu_bit sun8i_h3_r_resets
 #define H6_RST_BUS_UART1	22
 #define H6_RST_BUS_UART2	23
 #define H6_RST_BUS_UART3	24
+#define H6_RST_BUS_EMAC		33
 #define H6_RST_BUS_OHCI0	48
 #define H6_RST_BUS_OHCI3	49
 #define H6_RST_BUS_EHCI0	50
@@ -846,6 +851,7 @@ struct sxiccmu_ccu_bit sun50i_h6_resets[
 	[H6_RST_BUS_UART1] = { 0x090c, 17 },
 	[H6_RST_BUS_UART2] = { 0x090c, 18 },
 	[H6_RST_BUS_UART3] = { 0x090c, 19 },
+	[H6_RST_BUS_EMAC]  = { 0x097c, 16 },
 	[H6_RST_BUS_OHCI0] = { 0x0a8c, 16 },
 	[H6_RST_BUS_OHCI3] = { 0x0a8c, 19 },
 	[H6_RST_BUS_EHCI0] = { 0x0a8c, 20 },
@@ -853,9 +859,11 @@ struct sxiccmu_ccu_bit sun50i_h6_resets[
 };
 
 #define H6_R_RST_APB2_I2C	4
+#define H6_R_RST_APB2_RSB	7
 
 struct sxiccmu_ccu_bit sun50i_h6_r_resets[] = {
 	[H6_R_RST_APB2_I2C] = { 0x019c, 16 },
+	[H6_R_RST_APB2_RSB] = { 0x01bc, 16 },
 };
 
 /* R40 */
Index: dev/ic/com.c
===================================================================
RCS file: /cvs/src/sys/dev/ic/com.c,v
retrieving revision 1.174
diff -u -p -u -p -r1.174 com.c
--- dev/ic/com.c	6 May 2021 20:35:21 -0000	1.174
+++ dev/ic/com.c	14 Nov 2021 10:19:17 -0000
@@ -1300,7 +1300,7 @@ void
 com_attach_subr(struct com_softc *sc)
 {
 	int probe = 0;
-	u_int8_t lcr;
+	u_int8_t lcr, fifo;
 
 	sc->sc_ier = 0;
 	/* disable interrupts */
@@ -1480,6 +1480,25 @@ com_attach_subr(struct com_softc *sc)
 		SET(sc->sc_hwflags, COM_HW_FIFO);
 		sc->sc_fifolen = 256;
 		break;
+	case COM_UART_DW_APB:
+		printf(": DesignWare APB UART, ");
+		SET(sc->sc_hwflags, COM_HW_FIFO);
+		sc->sc_fifolen = CPR_FIFO_MODE(com_read_reg(sc, com_cpr)) * 16;
+		if (sc->sc_fifolen) {
+			printf("%d byte fifo\n", sc->sc_fifolen);
+		} else {
+			printf("no fifo\n");
+			/*
+			 * Allwinner H6's DW-APB configuration does not have
+			 * CPR register and detect as no fifo.
+			 * But this UART has 256 bytes FIFO and disabling FIFO
+			 * makes problem; LSR_RXRDY is still set after
+			 * reading com_data when FIFO is disabled (errata?).
+			 * For workaround, treat as 1 byte FIFO.
+			 */
+			sc->sc_fifolen = 1;
+		}
+		break;
 	default:
 		panic("comattach: bad fifo type");
 	}
@@ -1496,10 +1515,13 @@ com_attach_subr(struct com_softc *sc)
 	}
 
 	/* clear and disable fifo */
-	com_write_reg(sc, com_fifo, FIFO_RCV_RST | FIFO_XMT_RST);
+	/* DW-APB UART cannot turn off FIFO here (ddb will not work) */
+	fifo = (sc->sc_uarttype == COM_UART_DW_APB) ?
+		(FIFO_ENABLE | FIFO_TRIGGER_1) : 0;
+	com_write_reg(sc, com_fifo, fifo | FIFO_RCV_RST | FIFO_XMT_RST);
 	if (ISSET(com_read_reg(sc, com_lsr), LSR_RXRDY))
 		(void)com_read_reg(sc, com_data);
-	com_write_reg(sc, com_fifo, 0);
+	com_write_reg(sc, com_fifo, fifo);
 
 	sc->sc_mcr = 0;
 	com_write_reg(sc, com_mcr, sc->sc_mcr);
Index: dev/ic/comreg.h
===================================================================
RCS file: /cvs/src/sys/dev/ic/comreg.h,v
retrieving revision 1.20
diff -u -p -u -p -r1.20 comreg.h
--- dev/ic/comreg.h	14 Aug 2020 18:14:11 -0000	1.20
+++ dev/ic/comreg.h	14 Nov 2021 10:19:17 -0000
@@ -180,6 +180,9 @@
 #define ISR_TXPL	0x08	/* negative transmit data polarity */
 #define ISR_RXPL	0x10	/* negative receive data polarity */
 
+/* component parameter register (Synopsys DesignWare APB UART) */
+#define	CPR_FIFO_MODE(x)	(((x) >> 16) & 0xff)
+
 #define	COM_NPORTS	8
 
 /* Exar XR17V35X */
Index: dev/ic/comvar.h
===================================================================
RCS file: /cvs/src/sys/dev/ic/comvar.h,v
retrieving revision 1.58
diff -u -p -u -p -r1.58 comvar.h
--- dev/ic/comvar.h	14 Aug 2020 18:14:11 -0000	1.58
+++ dev/ic/comvar.h	14 Nov 2021 10:19:17 -0000
@@ -104,6 +104,7 @@ struct com_softc {
 #define	COM_UART_XR16850	0x10		/* 128 byte fifo */
 #define	COM_UART_OX16C950	0x11		/* 128 byte fifo */
 #define	COM_UART_XR17V35X	0x12		/* 256 byte fifo */
+#define	COM_UART_DW_APB		0x13		/* configurable */
 
 	u_char sc_hwflags;
 #define	COM_HW_NOIEN	0x01
Index: dev/ic/ns16550reg.h
===================================================================
RCS file: /cvs/src/sys/dev/ic/ns16550reg.h,v
retrieving revision 1.5
diff -u -p -u -p -r1.5 ns16550reg.h
--- dev/ic/ns16550reg.h	2 Jun 2003 23:28:02 -0000	1.5
+++ dev/ic/ns16550reg.h	14 Nov 2021 10:19:17 -0000
@@ -50,3 +50,9 @@
 #define	com_lsr		5	/* line status register (R/W) */
 #define	com_msr		6	/* modem status register (R/W) */
 #define com_scratch	7	/* scratch register (R/W) */
+
+/*
+ * Synopsys DesignWare APB UART additional registers
+ */
+#define	com_usr		31	/* UART status register (R) */
+#define	com_cpr		61	/* component parameter register (R) */